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11.发明申请ANALOG-TO-DIGITAL CONVERTER, RECEIVER ARRANGEMENT, FILTER ARRANGEMENT AND SIGNAL PROCESSING METHOD 失效模拟数字转换器，接收器布置，滤波器布置和信号处理方法公开(公告)号：US20080266161A1
公开(公告)日：2008-10-30
申请号：US11742307
申请日：2007-04-30
CPC分类号： H03H19/004 , H03M3/344 , H03M3/424
摘要： A filter arrangement comprises a switching element coupled to a filter input, wherein the switching element is controllable by a reference clock signal. The filter arrangement further comprises an input storage element, an output storage element, and a first and a second auxiliary storage element. The first and the second auxiliary storage element can each be connected in parallel to the input storage element or to the output storage element depending on a switching signal. The output storage element is coupled to a filter output. The filter arrangement can be used as a loop filter in an analog-to-digital converter, wherein the output signal of the filter arrangement is quantized to provide an output word. Respective feedback signals can be generated from the output word and be provided to the storage elements.
摘要翻译： 滤波器装置包括耦合到滤波器输入的开关元件，其中开关元件由参考时钟信号控制。 滤波器装置还包括输入存储元件，输出存储元件以及第一和第二辅助存储元件。 第一和第二辅助存储元件可以各自根据切换信号并联连接到输入存储元件或输出存储元件。 输出存储元件耦合到滤波器输出。 滤波器装置可以用作模数转换器中的环路滤波器，其中滤波器装置的输出信号被量化以提供输出字。 可以从输出字生成各个反馈信号，并将其提供给存储元件。
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公开(公告)号：US07420485B2
公开(公告)日：2008-09-02
申请号：US11726844
申请日：2007-03-23
IPC分类号： H03M3/00
CPC分类号： H03M7/3015
摘要： A sigma-delta modulator is supplied with a data word and includes a first and at least one further modulation stage, each having at least two adders. The adders in the first modulation stage process a low-significance component and a delayed more significant component of the data word and provide a result word and a carry at their respective outputs. The adders in the at least one further modulation stage process a low-significance component and a more significant component of the result word and provide a further result word and a carry at their respective outputs. The low-significance component and the more significant component of the result word are provided to the further modulation stages with an unvarying delay. A bit stream is derived from a carry from final instances of the at least two adders in the first modulation stage and in the further modulation stage respectively.
摘要翻译： Σ-Δ调制器被提供有数据字，并且包括第一和至少一个另外的调制级，每个具有至少两个加法器。 第一调制级中的加法器处理数据字的低有效分量和延迟更高有效分量，并在其各自的输出端提供结果字和进位。 所述至少一个另外的调制级中的加法器处理结果字的低有效分量和更重要的分量，并在其各自的输出端提供另外的结果字和进位。 结果字的低有效分量和更重要的分量被提供给具有不变延迟的进一步的调制阶段。 从第一调制阶段和另外的调制阶段的至少两个加法器的最终实例的进位分别导出比特流。
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13.发明申请ARRANGEMENT AND METHOD FOR DETERMINING A GRADIENT FACTOR FOR A DIGITALLY CONTROLLED OSCILLATOR, AND PHASE LOCKED LOOP 有权用于确定数字控制振荡器的梯度因子的装配和方法以及相位锁定环公开(公告)号：US20080042753A1
公开(公告)日：2008-02-21
申请号：US11840408
申请日：2007-08-17
申请人： Thomas Bauernfeind , Linus Maurer
发明人： Thomas Bauernfeind , Linus Maurer
CPC分类号： H03C3/0925 , H03C3/0941 , H03C3/095 , H03L7/093 , H03L7/095 , H03L7/0991 , H03L7/187 , H03L7/1976
摘要： An arrangement for determining a gradient factor for a digitally controlled oscillator has a data alignment device and an identification device. The data alignment device can be supplied a modulation signal, a phase error signal and an oscillator control word. The data alignment device is configured to output a modulation setting word based on the modulation signal, output a time interval magnitude based on the phase error signal and a reference interval, and output an oscillator modulation word based on the oscillator control word. The identification device is configured to adapt and output the gradient factor based on the modulation setting word, the time interval magnitude and the oscillator modulation word.
摘要翻译： 用于确定数字控制振荡器的梯度因子的装置具有数据对准装置和识别装置。 可以向数据对准装置提供调制信号，相位误差信号和振荡器控制字。 数据对准装置被配置为基于调制信号输出调制设置字，基于相位误差信号和参考间隔输出时间间隔幅度，并且基于振荡器控制字输出振荡器调制字。 识别装置被配置为基于调制设置字，时间间隔幅度和振荡器调制字来适应和输出梯度因子。
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公开(公告)号：US08169060B2
公开(公告)日：2012-05-01
申请号：US12748709
申请日：2010-03-29
CPC分类号： H01L23/66 , H01L2223/6627 , H01L2223/6677 , H01L2924/0002 , H01L2924/09701 , H01L2924/1903 , H01P5/107 , H01Q1/2283 , H01Q1/52 , H01Q9/0407 , H01Q13/06 , H01L2924/00
摘要： Some embodiments herein relate to a transmitter. The transmitter includes an integrated circuit (IC) package including a first antenna configured to radiate a first electromagnetic signal therefrom. A printed circuit board (PCB) substrate includes a waveguide configured to receive the first electromagnetic signal and to generate a waveguide signal based thereon. A second antenna can be electrically coupled to the waveguide and can radiate a second electromagnetic signal that corresponds to the waveguide signal. Other devices and methods are also disclosed.
摘要翻译： 本文中的一些实施例涉及发射机。 发射机包括集成电路（IC）封装，其包括被配置为从其辐射第一电磁信号的第一天线。 印刷电路板（PCB）基板包括配置为接收第一电磁信号并基于其产生波导信号的波导。 第二天线可以电耦合到波导并且可以辐射对应于波导信号的第二电磁信号。 还公开了其它装置和方法。
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公开(公告)号：US07394320B2
公开(公告)日：2008-07-01
申请号：US11584318
申请日：2006-10-20
IPC分类号： H03L7/00
摘要： A phase-locked loop suitable for mobile radio communications and a method for operating the same is disclosed. One embodiment of the phase-locked loop comprises an oscillator, a counter, a comparator, and a delay arrangement. The counter comprises a first input connected to the oscillator, a second input connected to a reference frequency terminal, and an output. An input of the comparator is connected to the output of the counter and an output of the comparator to the oscillator. The delay arrangement is connected between the oscillator and the first input of the counter or between the reference frequency terminal and the second input of the counter. The delay arrangement delays an input signal sent to an input of the delay arrangement, as a function of a sequence signal and makes a delayed signal available at an output of the delay arrangement.
摘要翻译： 公开了一种适用于移动无线电通信的锁相环路及其操作方法。 锁相环的一个实施例包括振荡器，计数器，比较器和延迟装置。 计数器包括连接到振荡器的第一输入端，连接到参考频率端子的第二输入端和输出端。 比较器的输入端连接到计数器的输出端和比较器的输出端连接到振荡器。 延迟装置连接在振荡器和计数器的第一输入端之间或连接在基准频率端子和计数器的第二输入端之间。 延迟装置将发送到延迟装置的输入的输入信号作为序列信号的函数进行延迟，并使延迟信号在延迟装置的输出处可用。
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16.发明申请PHASE/FREQUENCY DETECTOR, PHASE LOCKED LOOP, METHOD FOR PHASE/FREQUENCY DETECTION AND METHOD FOR GENERATING AN OSCILLATOR SIGNAL 有权相位/频率检测器，相位锁定环路，相位/频率检测方法及产生振荡器信号的方法公开(公告)号：US20080100386A1
公开(公告)日：2008-05-01
申请号：US11925539
申请日：2007-10-26
CPC分类号： H03L7/085 , H03D13/001 , H03L7/0991 , H03L7/18 , H03L2207/50
摘要： A phase/frequency detector has a modulo counter for outputting a counter word with a predetermined word length depending on an oscillator signal. In addition, a modulo integrator for outputting an integrator word with the predetermined word length as a function of integration of a channel word is provided. The phase/frequency detector also has a difference element for outputting a phase error word with the predetermined word length as a function of a difference between the counter word and the integrator word.
摘要翻译： 相位/频率检测器具有模计数器，用于根据振荡器信号输出具有预定字长的计数器字。 另外，提供了用于输出具有作为通道字的积分的函数的预定字长的积分器字的模积分器。 相位/频率检测器还具有差分元件，用于输出具有预定字长的相位误差字作为计数器字和积分器字之差的函数。
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17.发明申请公开(公告)号：US20070222526A1
公开(公告)日：2007-09-27
申请号：US11401393
申请日：2006-04-10
IPC分类号： H03L7/00
CPC分类号： H03L7/093 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03L7/099 , H03L7/18 , H03L2207/06
摘要： A digitally controlled oscillator device includes a programming input, a selection input and an oscillator core with a first capacitive element which is frequency determining and programmable. The first capacitive element is coupled to the programming input that receives a first data word by which an oscillating frequency of the oscillator device is programmed with a predetermined frequency step size. The oscillator device further includes a selection unit for selecting a mode which is coupled to the selection input that receives a mode selection signal. The mode is selectable from a plurality of modes depending on the mode selection signal and each mode from the plurality of modes is characterized by a predetermined frequency step size. The digitally controlled oscillator device also includes a deattenuation amplifier.
摘要翻译： 数字控制振荡器装置包括编程输入，选择输入和具有频率确定和可编程的第一电容元件的振荡器芯。 第一电容元件耦合到接收第一数据字的编程输入，通过该第一数据字，振荡器器件的振荡频率以预定频率步长编程。 振荡器装置还包括选择单元，用于选择耦合到接收模式选择信号的选择输入的模式。 该模式可以根据模式选择信号从多个模式中选择，并且来自多个模式的每个模式的特征在于预定的频率步长。 数字控制振荡器装置还包括去衰减放大器。
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公开(公告)号：US20070096833A1
公开(公告)日：2007-05-03
申请号：US11584318
申请日：2006-10-20
IPC分类号： H03L7/085
摘要： A phase-locked loop suitable for mobile radio communications and a method for operating the same is disclosed. One embodiment of the phase-locked loop comprises an oscillator, a counter, a comparator, and a delay arrangement. The counter comprises a first input connected to the oscillator, a second input connected to a reference frequency terminal, and an output. An input of the comparator is connected to the output of the counter and an output of the comparator to the oscillator. The delay arrangement is connected between the oscillator and the first input of the counter or between the reference frequency terminal and the second input of the counter. The delay arrangement delays an input signal sent to an input of the delay arrangement, as a function of a sequence signal and makes a delayed signal available at an output of the delay arrangement.
摘要翻译： 公开了一种适用于移动无线电通信的锁相环路及其操作方法。 锁相环的一个实施例包括振荡器，计数器，比较器和延迟装置。 计数器包括连接到振荡器的第一输入端，连接到参考频率端子的第二输入端和输出端。 比较器的输入端连接到计数器的输出端和比较器的输出端连接到振荡器。 延迟装置连接在振荡器和计数器的第一输入端之间或连接在基准频率端子和计数器的第二输入端之间。 延迟装置将发送到延迟装置的输入的输入信号作为序列信号的函数进行延迟，并使延迟信号在延迟装置的输出处可用。
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公开(公告)号：US09048248B2
公开(公告)日：2015-06-02
申请号：US13435362
申请日：2012-03-30
CPC分类号： H01L23/66 , H01L2223/6627 , H01L2223/6677 , H01L2924/0002 , H01L2924/09701 , H01L2924/1903 , H01P5/107 , H01Q1/2283 , H01Q1/52 , H01Q9/0407 , H01Q13/06 , H01L2924/00
摘要： Some embodiments herein relate to a transmitter. The transmitter includes an integrated circuit (IC) package including a first antenna configured to radiate a first electromagnetic signal therefrom. A printed circuit board (PCB) substrate includes a waveguide configured to receive the first electromagnetic signal and to generate a waveguide signal based thereon. A second antenna can be electrically coupled to the waveguide and can radiate a second electromagnetic signal that corresponds to the waveguide signal. Other devices and methods are also disclosed.
摘要翻译： 本文中的一些实施例涉及发射机。 发射机包括集成电路（IC）封装，其包括被配置为从其辐射第一电磁信号的第一天线。 印刷电路板（PCB）基板包括配置为接收第一电磁信号并基于其产生波导信号的波导。 第二天线可以电耦合到波导并且可以辐射对应于波导信号的第二电磁信号。 还公开了其它装置和方法。
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公开(公告)号：US20110084769A1
公开(公告)日：2011-04-14
申请号：US12578105
申请日：2009-10-13
CPC分类号： H03L7/099 , H03B2200/0092 , H03L7/093 , H03L7/1976 , H03L2207/05
摘要： A device comprises an oscillator circuit, a control circuit, a frequency detector circuit, and a processor circuit. The oscillator circuit comprises a frequency control input and is configured to output an oscillator signal. The frequency of the oscillator signal depends on an input signal applied to the frequency control input. The control circuit is configured to apply a first input signal value, a second input signal value, and a third input signal value to the frequency control input. The frequency detector circuit is configured to detect the first frequency value of the oscillator signal when the first input signal value is applied to the frequency control input, a second frequency value of the oscillator signal when the second input signal value is applied to the frequency control input, and a third frequency value of the oscillator signal when the third input signal value is applied to the frequency control input. The processor circuit is configured to calculate, on the basis of the first input signal value, the second input signal value, the third input signal value, the first frequency value, the second frequency value, and the third frequency value, a second order coefficient of a polynomial oscillator characteristic relating values of the frequency of the oscillator signal to values of the input signal.
摘要翻译： 一种装置包括振荡器电路，控制电路，频率检测器电路和处理器电路。 振荡器电路包括频率控制输入，并且被配置为输出振荡器信号。 振荡器信号的频率取决于施加到频率控制输入的输入信号。 控制电路被配置为向频率控制输入施加第一输入信号值，第二输入信号值和第三输入信号值。 频率检测器电路被配置为当第一输入信号值被施加到频率控制输入时检测振荡器信号的第一频率值，当第二输入信号值被施加到频率控制时，振荡器信号的第二频率值 输入和第三频率值，当第三输入信号值被施加到频率控制输入时。 处理器电路被配置为基于第一输入信号值来计算第二输入信号值，第三输入信号值，第一频率值，第二频率值和第三频率值，二阶系数 多项式振荡器特性将振荡器信号的频率值与输入信号的值相关联。
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