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    III-nitride material structures including silicon substrates
    14.
    发明申请
    III-nitride material structures including silicon substrates 有权
    III族氮化物材料结构，包括硅衬底

    公开(公告)号：US20060118819A1

    公开(公告)日：2006-06-08

    申请号：US11004628

    申请日：2004-12-03

    Applicant: Allen Hanson ,  John Roberts ,  Edwin Piner ,  Pradeep Rajagopal

    Inventor： Allen Hanson ,  John Roberts ,  Edwin Piner ,  Pradeep Rajagopal

    IPC: H01L31/109

    CPC classification number: H01L29/267 ,  H01L29/2003 ,  H01L29/7787

    Abstract: III-nitride material structures including silicon substrates, as well as methods associated with the same, are described. Parasitic losses in the structures may be significantly reduced which is reflected in performance improvements. Devices (such as RF devices) formed of structures of the invention may have higher output power, power gain and efficiency, amongst other advantages.

    Abstract translation: 描述了包括硅衬底的III族氮化物材料结构以及与其相关的方法。 结构中的寄生损失可能会显着降低，这反映在性能改进中。 由本发明的结构形成的器件（例如RF器件）可以具有更高的输出功率，功率增益和效率等优点。

    III-nitride materials including low dislocation densities and methods associated with the same
    15.
    发明申请
    III-nitride materials including low dislocation densities and methods associated with the same 有权

    公开(公告)号：US20060006500A1

    公开(公告)日：2006-01-12

    申请号：US10886506

    申请日：2004-07-07

    Applicant: Edwin Piner ,  John Roberts ,  Pradeep Rajagopal

    Inventor： Edwin Piner ,  John Roberts ,  Pradeep Rajagopal

    IPC: H01L29/12

    CPC classification number: C30B29/403 ,  C30B25/02 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02543

    Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g., electrical and optical) by increasing electron transport, limiting non-radiative recombination, and increasing compositional/growth uniformity, amongst other effects.

    Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates
    17.
    发明授权
    Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates 有权
    在碳化硅基体上的Pendeoepitaxial氮化镓半导体层

    公开(公告)号：US06177688B1

    公开(公告)日：2001-01-23

    申请号：US09198784

    申请日：1998-11-24

    Applicant: Kevin J. Linthicum ,  Thomas Gehrke ,  Darren B. Thomson ,  Eric P. Carlson ,  Pradeep Rajagopal ,  Robert F. Davis

    Inventor： Kevin J. Linthicum ,  Thomas Gehrke ,  Darren B. Thomson ,  Eric P. Carlson ,  Pradeep Rajagopal ,  Robert F. Davis

    IPC: H01L29267

    CPC classification number: C30B25/02 ,  C30B29/406 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265

    Abstract: An underlying gallium nitride layer on a silicon carbide substrate is masked with a mask that includes an array of openings therein, and the underlying gallium nitride layer is etched through the array of openings to define posts in the underlying gallium nitride layer and trenches therebetween. The posts each include a sidewall and a top having the mask thereon. The sidewalls of the posts are laterally grown into the trenches to thereby form a gallium nitride semiconductor layer. During this lateral growth, the mask prevents nucleation and vertical growth from the tops of the posts. Accordingly, growth proceeds laterally into the trenches, suspended from the sidewalls of the posts. The sidewalls of the posts may be laterally grown into the trenches until the laterally grown sidewalls coalesce in the trenches to thereby form a gallium nitride semiconductor layer. The lateral growth from the sidewalls of the posts may be continued so that the gallium nitride layer grows vertically through the openings in the mask and laterally overgrows onto the mask on the tops of the posts, to thereby form a gallium nitride semiconductor layer. The lateral overgrowth can be continued until the grown sidewalls coalesce on the mask to thereby form a continuous gallium nitride semiconductor layer. Microelectronic devices may be formed in the continuous gallium nitride semiconductor layer.

    Abstract translation: 在碳化硅衬底上的下面的氮化镓层用掩模进行掩模，该掩模包括其中的开口阵列，并且通过开口阵列蚀刻下面的氮化镓层，以在下面的氮化镓层和沟槽之间形成沟槽。 所述柱各自包括侧壁和其上具有掩模的顶部。 柱的侧壁横向生长到沟槽中，从而形成氮化镓半导体层。 在这种侧向生长期间，面罩防止从柱的顶部成核和垂直生长。 因此，生长横向进入沟槽，从柱的侧壁悬挂。 柱的侧壁可以横向生长到沟槽中，直到横向生长的侧壁在沟槽中聚结，从而形成氮化镓半导体层。 可以继续从柱的侧壁的横向生长，使得氮化镓层垂直地通过掩模中的开口生长，并且横向过度地延伸到柱的顶部上的掩模上，从而形成氮化镓半导体层。 横向过度生长可以继续，直到生长的侧壁在掩模上聚结，从而形成连续的氮化镓半导体层。 微电子器件可以形成在连续的氮化镓半导体层中。

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