Circuit arrangement for suppression of switching noises
    11.
    发明申请
    Circuit arrangement for suppression of switching noises 审中-公开
    用于抑制开关噪声的电路布置

    公开(公告)号:US20080089533A1

    公开(公告)日:2008-04-17

    申请号:US11900921

    申请日:2007-09-13

    IPC分类号: H04B15/00

    摘要: An integrated audio amplifier includes an operation amplifier that includes a precharging device and a monitoring device. The operation amplifier further comprises an input stage and an output stage. The output stage includes a compensation capacitor. The precharging device is configured to precharge the compensation capacitor to a voltage that can be predetermined. The monitoring device detects a not-ready-for operation state of the audio amplifier and activates the precharging device, while at the same time, the output stage is blocked until such time as the compensation capacitor is charged by the precharging device to the predetermined voltage.

    摘要翻译: 集成音频放大器包括具有预充电装置和监视装置的运算放大器。 运算放大器还包括输入级和输出级。 输出级包括补偿电容器。 预充电装置被配置为将补偿电容器预充电到可以预定的电压。 监视装置检测音频放大器的未就绪操作状态并启动预充电装置,同时输出级被阻塞,直到补偿电容器被预充电装置充电至预定电压 。

    Hall sensor with automatic compensation
    12.
    发明授权
    Hall sensor with automatic compensation 失效
    霍尔传感器具有自动补偿功能

    公开(公告)号:US5260614A

    公开(公告)日:1993-11-09

    申请号:US918484

    申请日:1992-07-22

    CPC分类号: G01R33/07 H01L27/22

    摘要: A circuit and method automatically compensate a monolithic integrated Hall sensor having a Hall element therein, wherein a device for generating operating currents is technologically and thermally tightly coupled with the Hall element. The production-induced and temperature-induced variations in the sensitivity of the Hall element are compensated for by a defined control of the supply current and the offset current. For the control, the thermal and technological parameters of the Hall element semiconductor region or equivalent regions in corresponding circuits are used. For this purpose, at least two current sources are provided which generate at least two auxiliary currents with different temperature dependences. By means of adding/subtracting devices, resultant currents with other temperature dependences are formed from the auxiliary currents by summation/subtraction and different weighting.

    摘要翻译: 电路和方法自动补偿其中具有霍尔元件的单片集成霍尔传感器,其中用于产生工作电流的装置与霍尔元件技术和热紧密耦合。 通过对供电电流和偏移电流的定义控制来补偿霍尔元件的灵敏度的产生和温度引起的变化。 为了控制,使用霍尔元件半导体区域或相应电路中的等效区域的热和工艺参数。 为此,提供至少两个电流源,其产生具有不同温度依赖性的至少两个辅助电流。 通过加/减设备,通过加减法和不同的加权从辅助电流形成具有其他温度依赖性的合成电流。

    Linear CMOS output stage
    13.
    发明授权
    Linear CMOS output stage 失效
    线性CMOS输出级

    公开(公告)号:US5113148A

    公开(公告)日:1992-05-12

    申请号:US705971

    申请日:1991-05-28

    申请人: Ulrich Theus

    发明人: Ulrich Theus

    IPC分类号: H03F1/32 H03F3/30

    CPC分类号: H03F1/3217 H03F3/3001

    摘要: A class-AB push-pull CMOS output stage is driven over a control line with a drive potential from an input stage. The control line feeds the gate terminals of a complementary transistor pair whose first transistor serves as a first push-pull output transistor and whose second transistor is connected to the gate terminal of a second push-pull output transistor via a current-mirror arrangement. The source terminals of the first and second transistors are tied to a first fixed potential and a second fixed potential, respectively, the latter being stabilized by a low-impedance active compensation circuit.

    摘要翻译: AB类推挽CMOS输出级通过来自输入级的驱动电位的控制线驱动。 控制线馈送互补晶体管对的栅极端子,其第一晶体管用作第一推挽输出晶体管,其第二晶体管经由电流镜布置连接到第二推挽输出晶体管的栅极端子。 第一和第二晶体管的源极端子分别被连接到第一固定电位和第二固定电位,后者由低阻抗有源补偿电路稳定。

    Transconductance amplifier
    14.
    发明授权
    Transconductance amplifier 失效
    跨导放大器

    公开(公告)号:US5047729A

    公开(公告)日:1991-09-10

    申请号:US615550

    申请日:1990-11-19

    申请人: Ulrich Theus

    发明人: Ulrich Theus

    IPC分类号: H03F3/34 H03F1/32 H03F3/45

    CPC分类号: H03F1/3211 H03F3/45071

    摘要: A transconductance amplifier is driven by a difference voltage which is coupled through a first input terminal to a first voltage-to-current converter and through a second input terminal to a second voltage-to-current converter of identical design. An identical third voltage-to-current converter has its input terminal connected to the tap of a resistive voltage divider which is connected between the first and second input terminals. The output signal of the transconductance amplifier can be taken from the current outputs of the first and second voltage-to-current converters. The current outputs have a difference current which is proportional to the value of the difference voltage.

    摘要翻译: 跨导放大器由差分电压驱动,该差电压通过第一输入端耦合到第一电压 - 电流转换器,并通过第二输入端耦合到相同设计的第二电压 - 电流转换器。 相同的第三电压 - 电流转换器的输入端连接到连接在第一和第二输入端子之间的电阻分压器的抽头。 跨导放大器的输出信号可以从第一和第二电压 - 电流转换器的电流输出中取出。 电流输出具有与差值电压成正比的差电流。

    Digital FIFO memory
    15.
    发明授权
    Digital FIFO memory 失效
    数字FIFO存储器

    公开(公告)号:US4901286A

    公开(公告)日:1990-02-13

    申请号:US232064

    申请日:1988-08-15

    申请人: Ulrich Theus

    发明人: Ulrich Theus

    CPC分类号: G06F5/08 G11C19/00

    摘要: A digital FIFO memory is disclosed which is formed by a memory cell array (zf) comprising of n signal channels (b1 . . . bn) each containing m memory cells (c..1, c..2, c..m-1, c..m) are first, second, and mth clock drivers (tt1, tt2, ttm-1, ttm), respectively, which are controlled by a basic clock signal (g1) and further signals. Thus FIFO memory makes it possible to pass an input data stream arriving at an input data rate (g2) through the FIFO memory in such a way that the output data stream appears at the output (da) at an output data rate (g3) momentarily different from the input data rate (g2). On a time average, however, the two data rates are equal, so that data can be written into and read from the FIFO memory simultaneously at different rates.

    摘要翻译: 公开了一种数字FIFO存储器,其由包含n个信号通道(b1 ... bn)的存储单元阵列(zf)形成,每个信号通道包含m个存储单元(c..1,c..2,c..m- 1,c..m)分别是由基本时钟信号(g1)和其它信号控制的第一,第二和第m个时钟驱动器(tt1,tt2,ttm-1,ttm)。 因此,FIFO存储器使得可以以使得输出数据流以输出数据速率(g3)瞬时出现在输出(da)的方式传递通过FIFO存储器到达输入数据速率(g2)的输入数据流 不同于输入数据速率(g2)。 然而,在时间平均上,两个数据速率是相等的,使得可以以不同的速率将数据写入FIFO存储器并从FIFO存储器中读取。

    Current switch
    16.
    发明授权
    Current switch 失效
    电流开关

    公开(公告)号:US4810912A

    公开(公告)日:1989-03-07

    申请号:US120452

    申请日:1987-11-13

    摘要: A current switch for use in digital-to-analog converters having high dynamic accuracy includes first and second electronic switches, the first of which connects either a constant-current source or a constant-current sink to an output terminal. The output terminal is connected to a low-pass filter. When the constant-current source is connected to the output terminal, the second switch connects the constant-current sink to a reference-voltage source. When the constant current sink is connected to the output terminal, the second electronic switch connects the constant current source to the reference-voltage terminal. This antiphase switching of the two electronic switches is controlled by a control circuit to which a clocked signal and a clock signal are applied. The clocked signal is, for example, a pulse-density-modulated signal which appears as a demodulated signal at the output of the low-pass filter. Switching is accomplished by limiting the swing of the control signals and using a control characteristic symmetrical with respect to the two switching edges.

    摘要翻译: 用于具有高动态精度的数模转换器的电流开关包括第一和第二电子开关,其中第一和第二电子开关将恒定电流源或恒流吸收器连接到输出端子。 输出端子连接到低通滤波器。 当恒流源连接到输出端时,第二个开关将恒流吸收器连接到参考电压源。 当恒定电流吸收器连接到输出端子时,第二个电子开关将恒流源连接到参考电压端子。 这两个电子开关的反相切换由施加时钟信号和时钟信号的控制电路来控制。 时钟信号例如是在低通滤波器的输出处作为解调信号出现的脉冲密度调制信号。 通过限制控制信号的摆动并使用相对于两个切换边缘对称的控制特性来实现切换。

    Clocked CMOS circuit with at least one CMOS switch
    17.
    发明授权
    Clocked CMOS circuit with at least one CMOS switch 失效
    具有至少一个CMOS开关的时钟CMOS电路

    公开(公告)号:US4801819A

    公开(公告)日:1989-01-31

    申请号:US67571

    申请日:1987-06-29

    摘要: To avoid interference signals caused by overlapping edges of a switching signal for driving p-channel-transistor/n-channel-transistor pairs, a drive circuit contains a first series combination of the current paths of a first p-channel transistor, a first n-switching transistor, and a first n-channel transistor and a second series combination of a second p-channel transistor, a second n-switching transistor and a second n-channel transistor, with the gate of the first p-channel transistor connected to the current-path junction of the second series combination, and the gate of the second p-channel transistor connected to the current-path junction of the first series combination. The switching signal and the inverse thereof are applied to the gates of the first n-channel transistor and the second n-channel transistor, respectively. The gates of the n-switching transistors are presented with the n-clock. The first and second current-path junctions are followed by a first inverter and a second inverter, respectively. If the transistor pair is to be turned on by the L or H level of the switching signal, the gate of the n-channel transistor of the pair is connected to the first current-path junction or the second current-path junction, respectively, and the gate of the p-channel transistor to the output of the first inverter or the second inverter, respectively.

    摘要翻译: 为了避免由用于驱动p沟道晶体管/ n沟道晶体管对的开关信号的重叠边缘引起的干扰信号,驱动电路包含第一p沟道晶体管的电流路径的第一串联组合,第一n沟道晶体管 开关晶体管,以及第一p沟道晶体管和第二n沟道晶体管的第一n沟道晶体管和第二串联组合,其中第一p沟道晶体管的栅极连接到 第二串联组合的电流路径结和与第一串联组合的电流路径结连接的第二p沟道晶体管的栅极。 开关信号及其反相分别被施加到第一n沟道晶体管和第二n沟道晶体管的栅极。 n开关晶体管的栅极呈现n时钟。 第一和第二电流路径结之后分别是第一反相器和第二反相器。 如果要将晶体管对导通开关信号的L或H电平,则该对的n沟道晶体管的栅极分别连接到第一电流路径结或第二电流路径结, 和p沟道晶体管的栅极分别连接到第一反相器或第二反相器的输出端。

    Monolithic integrated digital-to-analog converter
    18.
    发明授权
    Monolithic integrated digital-to-analog converter 失效
    单片集成数模转换器

    公开(公告)号:US4791406A

    公开(公告)日:1988-12-13

    申请号:US74205

    申请日:1987-07-16

    IPC分类号: H03M1/74 G06F3/05 H03M1/00

    CPC分类号: H03M1/74

    摘要: A monolithic integrated digital-to-analog converter makes use of rotating current-source control (dynamic element matching). After the conversion of a digital input signal into a code containing a sequence of first binary conditions corresponding to the numerical value of the input signal (so-called thermometer code), the bit switches of possibly same-sized current sources are rotatingly controlled in the sense of being selected, so that it becomes possible in the manufacture of the monolithic integrated digital-to-analog converters to balance out the manufacturing tolerances or process variations of the current sources.

    摘要翻译: 单片集成数模转换器利用旋转电流源控制(动态元件匹配)。 在将数字输入信号转换成包含与输入信号的数值(所谓的温度计代码)相对应的第一二进制条件的代码的代码之后,可能相同大小的电流源的位切换被旋转地控制在 被选择的感觉,使得在单片集成数模转换器的制造中变得可以平衡电流源的制造公差或工艺变化。

    LEVEL SHIFTER HAVING A CASCODE CIRCUIT AND DYNAMIC GATE CONTROL
    19.
    发明申请
    LEVEL SHIFTER HAVING A CASCODE CIRCUIT AND DYNAMIC GATE CONTROL 审中-公开
    具有CASCODE电路和动态门控制的电平变换器

    公开(公告)号:US20100109744A1

    公开(公告)日:2010-05-06

    申请号:US12613959

    申请日:2009-11-06

    IPC分类号: H03L5/00

    摘要: A level shifter for converting an input signal (in) from a first operating voltage range (I) having a first ground potential (VSS1) and a first operating potential (VDD1) into an output signal (out) in a second operating voltage range (II) having a second ground potential (VSS2) and a second operating potential (VDD2). An input circuit (1) receives the input signal and an output circuit (2) provides the output signal (out), where the input circuit includes a parallel circuit made up by a first cascode circuit and a second cascode circuit, and the first and second cascode circuits each being formed by a first transistor in the source circuit and a second transistor in the gate circuit, a dynamic control being provided for the second transistors.

    摘要翻译: 一种电平移位器,用于将具有第一接地电位(VSS1)和第一操作电位(VDD1)的第一工作电压范围(I)的输入信号(in)转换成第二工作电压范围内的输出信号(out) II)具有第二接地电位(VSS2)和第二工作电位(VDD2)。 输入电路(1)接收输入信号,并且输出电路(2)提供输出信号(out),其中输入电路包括由第一共源共栅电路和第二共源共栅电路组成的并联电路,第一和 每个由源极电路中的第一晶体管和栅极电路中的第二晶体管形成的第二共源共栅电路,为第二晶体管提供动态控制。

    LEVEL SHIFTER HAVING NATIVE TRANSISTORS
    20.
    发明申请
    LEVEL SHIFTER HAVING NATIVE TRANSISTORS 审中-公开
    具有本体晶体管的液位变换器

    公开(公告)号:US20100109743A1

    公开(公告)日:2010-05-06

    申请号:US12613901

    申请日:2009-11-06

    IPC分类号: H03L5/00

    CPC分类号: H03K3/356113 H03K17/102

    摘要: A level shifter for converting an input signal (in) from a first operating voltage range (I) having a first ground potential (VSS1) and a first operating potential (VDD1) in a second operating voltage range (II) having a second ground potential (VSS2) and a second operating potential (VDD2), having an input circuit to which the input signal (in) may be applied and an output circuit at which the output signal (out) may be picked off, the input circuit having at least one native transistor.

    摘要翻译: 一种电平移位器,用于在具有第二接地电位的第二工作电压范围(II)中将具有第一接地电位(VSS1)和第一操作电位(VDD1)的第一工作电压范围(I)的输入信号(in) (VSS2)和第二工作电位(VDD2),其具有可以被施加输入信号(in)的输入电路和输出电路,输出信号(out)可以在该输出电路被拾取,输入电路至少具有 一个原生晶体管。