Abstract:
A method of fabricating an image sensor device includes forming an insulating layer on a substrate including a photodiode therein, and forming a wiring structure on the insulating layer. The wiring structure includes at least one wiring layer and at least one insulating interlayer. A cavity is formed extending into the wiring structure over the photodiode to expose a surface of the at least one insulating interlayer. The surface of the at least one insulating interlayer exposed by the cavity is modified to define a hydrophobic surface. Related systems and devices are also discussed.
Abstract:
An image sensor includes a substrate including a sensor array area, a pad area, and a circuit area, a wiring layer on the pad area, and a light-shielding pattern on the sensor array area. The sensor array area includes a first area including active pixels and a second area including optical back pixels. The wiring layer is apart from the substrate by a first distance on the pad area. The light-shielding pattern includes a first portion spaced apart from the substrate by a second distance less than the first distance, a second portion disposed between the first portion and the wiring layer and extending on the same level as the wiring layer, and a third portion disposed between the first portion and the second portion and integrally formed with the first portion and the second portion.
Abstract:
A data transmission device includes a control unit and a delay chain unit. The control unit outputs a first control signal through an nth control signal, where n is a natural number. The delay chain unit includes a first switching element through an nth switching element. The switching elements receive a first data signal through an nth data signal and perform pipelining operations on the first through nth data signals based upon the first through nth control signals, respectively, to output the pipelined data signals as at least one data stream. The switching elements are connected to each other to form at least one data delay chain.
Abstract:
There is provided a power factor correction circuit capable of correcting a power factor of a power converting module through increasing an input current by switching a main switching element of a power converting module on the basis of a first reference wave having a slope based on a first signal and an error voltage, in particular, by limiting a switching frequency on the basis of a first reference wave having a slope based on a second signal lower than a first signal and an error voltage when the switching frequency of the main switching element increases because an input voltage of the power converting module is low.
Abstract:
One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.
Abstract:
The present invention provides a non-vacuum method of depositing a photovoltaic absorber layer based on electrophoretic deposition of a mixture of nanoparticles with a controlled atomic ratio between the elements. The nanoparticles are first dispersed in a liquid medium to form a colloidal suspension and then electrophoretically deposited onto a substrate to form a thin film photovoltaic absorber layer. The absorber layer may be subjected to optional post-deposition treatments for photovoltaic absorption.
Abstract:
A CDS circuit is provided. The CDS circuit includes a signal compressor which compresses each of a pixel signal and a ramp signal using capacitive dividing and outputs a compressed pixel signal and a compressed ramp signal, and a comparator which compares the compressed pixel signal with the compressed ramp signal and outputs a comparative signal corresponding to a comparison result.
Abstract:
A method of multiplexing control information and data information in a wireless communication system is disclosed. The present invention includes mapping codewords corresponding to the data information to a preset number of layers, mapping the control information to the preset number of the layers, multiplexing the layer-mapped data information and the layer-mapped control information into a frequency region within an SC-FDMA symbol, and transmitting the SC-FDMA symbol to a base station via multiple antennas.
Abstract:
An offset canceling circuit stores charge corresponding to a voltage difference between a reset voltage received from a unit pixel and a reference voltage, thereby canceling an offset of the unit pixel.
Abstract:
A method for efficiently scheduling virtual resource blocks to physical resource blocks is disclosed. In a wireless mobile communication system, for distributed mapping of consecutively allocated virtual resource blocks to physical resource blocks, when nulls are inserted into a block interleaver used for the mapping, they are uniformly distributed to ND divided groups of the block interleaver, which are equal in number to the number (ND) of physical resource blocks to which one virtual resource block is mapped.