公开(公告)号：US20130015933A1

公开(公告)日：2013-01-17

申请号：US13456689

申请日：2012-04-26

Applicant: Chun-Ching YEN ,  Yu-Jen Huang

Inventor： Chun-Ching YEN ,  Yu-Jen Huang

IPC: H01F27/29

CPC classification number: H01F27/027 ,  H01F27/266 ,  H01F27/306 ,  H01F2027/297

Abstract: A transformer includes a base, a magnetic core unit and a winding assembly. The base includes a base body and a pin disposed on the base body. The magnetic core unit is disposed in the base body, and the winding assembly is disposed in the magnetic core unit. A winding of the winding assembly is connected to the pin.

Abstract translation: 变压器包括基座，磁芯单元和绕组组件。 基座包括基体和设置在基体上的销。 磁芯单元设置在基体中，并且绕组组件设置在磁芯单元中。 绕组组件的绕组连接到销。

公开(公告)号：US20130009990A1

公开(公告)日：2013-01-10

申请号：US13468006

申请日：2012-05-09

Applicant: Wei-Ling Hsu ,  Ming-Che Weng ,  Yu-Jen Huang ,  Hong-Tien Wang ,  Shi-Kuan Chen

Inventor： Wei-Ling Hsu ,  Ming-Che Weng ,  Yu-Jen Huang ,  Hong-Tien Wang ,  Shi-Kuan Chen

IPC: G09G5/00 ,  G06F3/041

CPC classification number: G06F1/1694 ,  G06F3/04817 ,  G06F3/0483 ,  G06F3/0488

Abstract: An information display method for an electronic device is provided, wherein the electronic device includes a display apparatus, a processor and a sensor unit. The display apparatus displays at least a stacked icon composed of a plurality pieces of information. The information display method includes processing the sensing signal received from the sensor unit by the electronic device. According the sensing signal, a launching signal is provided by the processor. According the launching signal, the stacked icon is spread out by the processor to display each piece of the information.

Abstract translation: 提供了一种电子设备的信息显示方法，其中电子设备包括显示设备，处理器和传感器单元。 显示装置至少显示由多条信息组成的堆叠图标。 信息显示方法包括处理由电子设备从传感器单元接收的感测信号。 根据感测信号，处理器提供发射信号。 根据启动信号，堆叠的图标由处理器展开以显示每条信息。

公开(公告)号：US20110075024A1

公开(公告)日：2011-03-31

申请号：US12963846

申请日：2010-12-09

Applicant: Chia-Ching Tso ,  Yu-Jen Huang ,  Chih-Hao Lin

Inventor： Chia-Ching Tso ,  Yu-Jen Huang ,  Chih-Hao Lin

IPC: H04N5/225 ,  H05K13/04

CPC classification number: H04N5/2253 ,  H04N5/2257 ,  Y10T29/53174

Abstract: A holder is disclosed, wherein the holder is situated on a circuit board and is used for connecting with an electronic component. The holder comprises an upper surface, a lower surface, and an opening. The upper surface comprises a recess used for laying a flat component, wherein the recess comprises at least one rough area; the lower surface comprises a protruding edge, wherein the protruding edge is connected with the circuit board with glue, and the protruding side and the circuit board delimit a space; and the opening penetrates the upper surface and the lower surface, whereby the gas generated from heating the glue will accumulate in the enclosed space, and the gas will then escape through the opening and out through at least one of the rough areas.

Abstract translation: 公开了一种保持器，其中保持器位于电路板上并且用于与电子部件连接。 保持器包括上表面，下表面和开口。 上表面包括用于铺设平坦部件的凹槽，其中凹部包括至少一个粗糙区域; 所述下表面包括突出边缘，其中所述突出边缘与所述电路板连接，并且所述突出侧和所述电路板限定空间; 并且开口穿透上表面和下表面，由此由加热胶水产生的气体将积聚在封闭空间中，然后气体将通过开口逸出并穿过至少一个粗糙区域。

公开(公告)号：US20080317564A1

公开(公告)日：2008-12-25

申请号：US11768192

申请日：2007-06-25

Applicant: Chi-Piao Cheng ,  Li-Chun Liang ,  Yu-Jen Huang ,  Been Chen

Inventor： Chi-Piao Cheng ,  Li-Chun Liang ,  Yu-Jen Huang ,  Been Chen

IPC: B65G49/07

CPC classification number: C23C14/50 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/32706

Abstract: A wafer supporting device of a sputter apparatus includes a pedestal positioned in a sputtering chamber and used to load a wafer for sputtering, a deposition ring having a recess positioned on a peripheral portion of the pedestal, and a cover ring positioned on the pedestal and the deposition ring. The cover ring has a gate corresponding to the recess.

Abstract translation: 溅射装置的晶片支撑装置包括位于溅射室中并用于装载用于溅射的晶片的基座，具有位于基座的周边部分上的凹部的沉积环和位于基座上的盖环， 沉积环。 盖环具有对应于凹部的门。

公开(公告)号：US20080270857A1

公开(公告)日：2008-10-30

申请号：US11747922

申请日：2007-05-14

Applicant: Yu-Jen Huang ,  Chih-Hung Lin

Inventor： Yu-Jen Huang ,  Chih-Hung Lin

IPC: G06F11/25

CPC classification number: G06F17/5077 ,  G01R31/2815 ,  G01R31/318591 ,  G06F17/5081 ,  G06F2217/40

Abstract: Read the description file of a PCBA without determining and selecting connectors which might be relevant to boundary scan. The description file of the PCBA determines which pins of the connectors on the PCBA should correspond to the pins of a test I/O module. And use the wiring report generated by an auto test program generator to correspond the pins of the test I/O module to the pins of the connectors which are accessed by boundary scan. Thus the IC of the test I/O module would not have any unused pin between any two consecutive pins wired to the connectors of the PCBA.

Abstract translation: 阅读PCBA的描述文件，而无需确定和选择可能与边界扫描相关的连接器。 PCBA的描述文件确定PCBA上的连接器的哪些引脚应对应于测试I / O模块的引脚。 并使用自动测试程序生成器生成的接线报告将测试I / O模块的引脚对应到通过边界扫描访问的连接器的引脚。 因此，测试I / O模块的IC在连接到PCBA的连接器的任何两个连续引脚之间不会有任何未使用的引脚。

公开(公告)号：US20050133888A1

公开(公告)日：2005-06-23

申请号：US10737905

申请日：2003-12-18

Applicant: Bily Wang ,  Bill Chang ,  Yu-Jen Huang ,  Chao-Yen Hsieh

Inventor： Bily Wang ,  Bill Chang ,  Yu-Jen Huang ,  Chao-Yen Hsieh

IPC: H01L23/495

CPC classification number: H01L23/49558 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package substrate having a chip on a substrate has a die pad on the substrate. The chip is attached on the die pad via ah adhesive. A plurality of gold contacts is distributed on the die pad for electrically connecting to the chip. A plurality of traces is distributed around the die pad to connect to the chip via wires. An adhesive dike is formed between the die pad and the traces to prevent the adhesive from flowing out of the die pad when the chip is attached on the die pad.

Abstract translation: 在衬底上具有芯片的封装衬底在衬底上具有管芯焊盘。 芯片通过粘合剂附着在芯片上。 多个金触点分布在芯片焊盘上以电连接到芯片。 多个迹线分布在芯片焊盘周围，以通过导线连接到芯片。 在芯片焊盘和迹线之间形成粘合剂堤，以防止当芯片安装在芯片焊盘上时粘合剂从芯片焊盘流出。

公开(公告)号：USD483729S1

公开(公告)日：2003-12-16

申请号：US29171154

申请日：2002-11-19

Applicant: Yu Jen Huang ,  Hung Yuan Chen

Designer： Yu Jen Huang ,  Hung Yuan Chen

公开(公告)号：US20120180000A1

公开(公告)日：2012-07-12

申请号：US13073974

申请日：2011-03-28

Applicant: Ming-Che Weng ,  Wei-Ling Hsu ,  Yu-Jen Huang ,  Pei-Fen Deng ,  Chun-Cheng Chen ,  Shi-Kuan Chen ,  Hong-Tien Wang

Inventor： Ming-Che Weng ,  Wei-Ling Hsu ,  Yu-Jen Huang ,  Pei-Fen Deng ,  Chun-Cheng Chen ,  Shi-Kuan Chen ,  Hong-Tien Wang

IPC: G06F3/048

CPC classification number: G06T19/00 ,  G06F3/04815 ,  G06T2200/24

Abstract: A method and a system for simulating a three-dimensional (3D) operating interface are provided. The method includes defining a partition line to partition a display frame of a screen into a first area and a second area, and defining a size of a unit grid to establish a first grid plane and a second grid plane in the first area and the second area respectively, the first grid plane and the second grid plane forming a simulated 3D grid space. The method also includes taking the unit grid as a unit to define an object size and an initial grid coordinate of an object. The initial grid coordinate is on one of the first and the second grid planes. The method further includes mapping out a simulated 3D space in the simulated 3D grid space for displaying the object according to the initial grid coordinate and the object size.

Abstract translation: 提供了一种用于模拟三维（3D）操作界面的方法和系统。 该方法包括定义分割线以将屏幕的显示帧划分为第一区域和第二区域，并且定义单位格栅的大小以在第一区域和第二区域中建立第一格子平面和第二格子平面 区域，第一格架平面和第二格子平面形成模拟3D网格空间。 该方法还包括以单位网格为单位来定义对象的对象大小和初始网格坐标。 初始网格坐标位于第一和第二网格平面中的一个上。 该方法还包括在模拟3D网格空间中映射模拟3D空间，以根据初始网格坐标和对象大小显示对象。

公开(公告)号：US08062487B2

公开(公告)日：2011-11-22

申请号：US11768192

申请日：2007-06-25

Applicant: Chi-Piao Cheng ,  Li-Chun Liang ,  Yu-Jen Huang ,  Been Chen ,  Sheng-Yih Ting

Inventor： Chi-Piao Cheng ,  Li-Chun Liang ,  Yu-Jen Huang ,  Been Chen ,  Sheng-Yih Ting

IPC: C25B9/00 ,  C25B11/00 ,  C25B13/00 ,  C23C14/00 ,  C23C16/00 ,  C23C16/50

CPC classification number: C23C14/50 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/32706

Abstract: A wafer supporting device of a sputter apparatus includes a pedestal positioned in a sputtering chamber and used to load a wafer for sputtering, a deposition ring having a recess positioned on a peripheral portion of the pedestal, and a cover ring positioned on the pedestal and the deposition ring. The cover ring has a gate corresponding to the recess.

Abstract translation: 溅射装置的晶片支撑装置包括位于溅射室中并用于装载用于溅射的晶片的基座，具有位于基座的周边部分上的凹部的沉积环和位于基座上的盖环， 沉积环。 盖环具有对应于凹部的门。

公开(公告)号：US07610535B2

公开(公告)日：2009-10-27

申请号：US11747922

申请日：2007-05-14

Applicant: Yu-Jen Huang ,  Chih-Hung Lin

Inventor： Yu-Jen Huang ,  Chih-Hung Lin

IPC: G01R31/309 ,  G01R31/40

CPC classification number: G06F17/5077 ,  G01R31/2815 ,  G01R31/318591 ,  G06F17/5081 ,  G06F2217/40

Abstract: Read the description file of a PCBA without determining and selecting connectors which might be relevant to boundary scan. The description file of the PCBA determines which pins of the connectors on the PCBA should correspond to the pins of a test I/O module. And use the wiring report generated by an auto test program generator to correspond the pins of the test I/O module to the pins of the connectors which are accessed by boundary scan. Thus the IC of the test I/O module would not have any unused pin between any two consecutive pins wired to the connectors of the PCBA.

Abstract translation: 阅读PCBA的描述文件，而无需确定和选择可能与边界扫描相关的连接器。 PCBA的描述文件确定PCBA上的连接器的哪些引脚应对应于测试I / O模块的引脚。 并使用自动测试程序生成器生成的接线报告将测试I / O模块的引脚对应到通过边界扫描访问的连接器的引脚。 因此，测试I / O模块的IC在连接到PCBA的连接器的任何两个连续引脚之间不会有任何未使用的引脚。