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公开(公告)号：US20170299650A1
公开(公告)日：2017-10-19
申请号：US15490584
申请日：2017-04-18
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
CPC classification number: G01R31/2879 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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12.发明申请公开(公告)号：US20190293692A1
公开(公告)日：2019-09-26
申请号：US16360356
申请日：2019-03-21
Applicant: Analog Devices Global Unlimited Company
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L27/02 , H01L23/60 , H01L23/62 , H02H9/04
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号：US10338132B2
公开(公告)日：2019-07-02
申请号：US15291742
申请日：2016-10-12
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Thomas G. O'Dwyer , David Aherne , Michael A. Looby
IPC: G01R31/28
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring. An integrated circuit device includes a core circuit and a wear-out monitor device. The wear-out monitor device configured to adjust an indication of wear out of the core circuit regardless of whether the core circuit is activated The integrated circuit further includes a sensing circuit coupled to the wear-out monitor device and configured to detect an electrical property of the wear-out monitor device that is indicative of a wear-out level of the core-circuit.
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公开(公告)号：US20190128939A1
公开(公告)日：2019-05-02
申请号：US15801132
申请日：2017-11-01
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号：US09871373B2
公开(公告)日：2018-01-16
申请号：US14671767
申请日：2015-03-27
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
CPC classification number: H02H9/04 , H01L27/0248 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H02H9/02 , H02H9/042 , H02H9/046 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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Patent Agency Ranking
公开(公告)号：US20170299649A1
公开(公告)日：2017-10-19
申请号：US15291742
申请日：2016-10-12
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Thomas G. O'Dwyer , David Aherne , Michael A. Looby
IPC: G01R31/26
CPC classification number: G01R31/2879 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring. An integrated circuit device includes a core circuit and a wear-out monitor device. The wear-out monitor device configured to adjust an indication of wear out of the core circuit regardless of whether the core circuit is activated The integrated circuit further includes a sensing circuit coupled to the wear-out monitor device and configured to detect an electrical property of the wear-out monitor device that is indicative of a wear-out level of the core-circuit.
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公开(公告)号：US20160285255A1
公开(公告)日：2016-09-29
申请号：US14671767
申请日：2015-03-27
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
CPC classification number: H02H9/04 , H01L27/0248 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H02H9/02 , H02H9/042 , H02H9/046 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
Abstract translation: 本公开的方面涉及检测和记录与电应力（EOS）事件相关的信息，例如静电放电（ESD）事件。 例如，在一个实施例中，一种装置包括电过压保护装置，被配置为检测EOS事件的发生的检测电路，以及被配置为存储指示EOS事件的信息的存储器。
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公开(公告)号：US10677822B2
公开(公告)日：2020-06-09
申请号：US15708958
申请日：2017-09-19
Applicant: Analog Devices Global Unlimited Company
Inventor： David J. Clarke , Stephen Denis Heffernan , Alan J. O'Donnell , Patrick M. McGuinness
IPC: G01R31/00 , G01R19/165 , H01L23/60 , H01L27/02 , G01R31/28 , G01N25/04 , H01L23/525 , H01L23/62 , H01L25/065
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.
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公开(公告)号：US20180088155A1
公开(公告)日：2018-03-29
申请号：US15708958
申请日：2017-09-19
Applicant: Analog Devices Global Unlimited Company
Inventor： David J. Clarke , Stephen Denis Heffernan , Alan J. O'Donnell , Patrick M. McGuinness
IPC: G01R19/165 , H01L23/62 , H01L23/525 , G01N25/04 , G01R31/28
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.
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公开(公告)号：US09484739B2
公开(公告)日：2016-11-01
申请号：US14496839
申请日：2014-09-25
Applicant: ANALOG DEVICES GLOBAL
Inventor： Edward John Coyne , John Twomey , Seamus P. Whiston , David J. Clarke , Donal P. McAuliffe , William Allan Lane , Stephen Denis Heffernan , Brian A. Moane , Brian Michael Sweeney , Patrick Martin McGuinness
CPC classification number: H02H9/044 , H01L27/0259 , H02H7/16
Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.
Abstract translation: 提供一种保护装置，其展现了一纳秒或更少的转动时间。 这样一种器件为集成电路提供了防止静电放电事件的增强保护。 这反过来又降低了使用设备故障的风险。 保护装置可以包括连接在要保护的节点和放电路径之间的双极晶体管结构。
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