METHOD FOR OPERATING A SHIPPING PROCESS WITHIN A LOGISTICS SYSTEM
    11.
    发明申请
    METHOD FOR OPERATING A SHIPPING PROCESS WITHIN A LOGISTICS SYSTEM 审中-公开
    在物流系统中运行运输过程的方法

    公开(公告)号:US20100205104A1

    公开(公告)日:2010-08-12

    申请号:US12679578

    申请日:2008-09-09

    申请人: Brian Johnson

    发明人: Brian Johnson

    摘要: There is provided an exemplary method for operating a shipping process within a logistics system. An exemplary logistics system includes a first client and a shipping station that comprises a second client. Both the first client and the second client are connected to a server. A shipment may be deposited at the shipping station. The exemplary method comprises receiving identification and/or authentication data on the shipment via the first client and forwarding the data to the server. The exemplary method also comprises processing the data and preparing a pre-configuration of the shipping process. The pre-configuration of the shipping process is forwarded to the second client. The pre-configuration of the shipping process via the second client may be supplemented when the shipment is deposited at the shipping station.

    摘要翻译: 提供了用于操作物流系统内的运输过程的示例性方法。 示例性物流系统包括第一客户端和包括第二客户端的运送站。 第一个客户端和第二个客户端都连接到服务器。 货物可以存放在航运站。 该示例性方法包括经由第一客户端在货物上接收标识和/或认证数据,并将数据转发到服务器。 该示例性方法还包括处理数据并准备运送过程的预配置。 运送过程的预配置转发给第二个客户端。 当货物存放在装运站时,可以补充通过第二客户端的装运过程的预配置。

    Infrastructure method and system for authenticated dynamic security domain boundary extension
    13.
    发明授权
    Infrastructure method and system for authenticated dynamic security domain boundary extension 失效
    验证动态安全域边界扩展的基础设施方法和系统

    公开(公告)号:US07469417B2

    公开(公告)日:2008-12-23

    申请号:US10462994

    申请日:2003-06-17

    IPC分类号: G06F7/04 H04L9/00

    CPC分类号: H04L63/08

    摘要: A method and system for authenticated dynamic extension of security domain boundaries includes high security domain extension instructions for sequentially and dynamically forming an extended high security domain (133) through a protected communication path (128). The protected communication path (128) extends from a first computer (10) associated with a high security domain (80) into a second computer (10) associated with low security domain (120). The method and system establish the extended high security domain (133) within the second computer (10). A protected communication path (128) forms an isolation barrier (131) separating the extended high security domain (133) from other objects (126) within the low security domain (120). Authentication instructions (146) temporarily 20 authenticate at least one object (132) associated with the low security domain (120). Returning instructions (156) return the at least one object (132) processed within the extended high security domain (133) to said low security domain (120).

    摘要翻译: 用于认证的安全域边界的动态扩展的方法和系统包括用于通过受保护的通信路径(128)顺序地和动态地形成扩展的高安全域(133)的高安全域扩展指令。 受保护的通信路径(128)从与高安全域(80)相关联的第一计算机(10)扩展到与低安全域(120)相关联的第二计算机(10)。 该方法和系统在第二计算机(10)内建立扩展的高安全域(133)。 受保护的通信路径(128)形成将扩展高安全域(133)与低安全域(120)内的其他对象(126)分离的隔离屏障(131)。 认证指令(146)临时认证与低安全域(120)相关联的至少一个对象(132)。 返回指令(156)将在扩展高安全域(133)内处理的至少一个对象(132)返回到所述低安全域(120)。

    Memory device and method having data path with multiple prefetch I/O configurations
    14.
    发明申请
    Memory device and method having data path with multiple prefetch I/O configurations 失效
    具有多个预取I / O配置的数据路径的存储器件和方法

    公开(公告)号:US20080089158A1

    公开(公告)日:2008-04-17

    申请号:US11999383

    申请日:2007-12-04

    IPC分类号: G11C7/00

    摘要: A memory device is operable in either a high mode or a low speed mode. In either mode, 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to 4 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 4 data bus terminals. In the low speed mode, two sets of prefetched data bits are transferred in parallel to 8 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 8 data bus terminals.

    摘要翻译: 存储器件可以在高模式或低速模式下操作。 在任一模式中,来自两个存储器阵列中的每一个的32位数据被预取到相应的32个触发器组中。 在高速模式下,预取数据位并行传输到4个并行到串行转换器,它们将并行数据位转换为8个串行数据位的脉冲串,并将该脉冲串应用于4个数据总线 终端。 在低速模式下,两组预取数据位并行传送到8个并行到串行转换器,它们将并行数据位转换为8个串行数据位的脉冲串,并将该脉冲串应用于8个数据中的相应一个 巴士总站。

    Access and escape devices
    16.
    发明申请
    Access and escape devices 审中-公开
    访问和退出设备

    公开(公告)号:US20070209870A1

    公开(公告)日:2007-09-13

    申请号:US11603378

    申请日:2006-11-21

    申请人: Brian Johnson

    发明人: Brian Johnson

    IPC分类号: A62B1/20

    CPC分类号: A62B1/20

    摘要: To provide another way to exit and/or enter a building, the multiple-story building may include alternative access devices. For example, some of the windows on the upper floors may be equipped with devices to allow occupants of those floors to exit and/or enter the building via the window. The devices may be integrated with the building. Alternatively, or additionally, the devices may be portable and installed when needed, such as during an emergency. The alternative access devices also may be used for other applications. For example, the devices may provide access to a structure that is a considerable distance from the ground, such as a tree house or other play structure. The invented access device includes a chute mounted at the top to a pivotal frame mounted near a window or other elevated opening, the chute having a connected or independently deployable step ladder therein and optionally spaced apart support members such as circular, rectangular or oval hoops therearound. The rungs of the step ladder provide a standoff for the webbed material of the chute. Stowage can be in an interior wall of an elevated structure and deployment can be semi-automatic, reliable and smooth.

    摘要翻译: 为了提供另一种方式来退出和/或进入建筑物,多层建筑可以包括替代的访问设备。 例如,较高楼层的一些窗户可能配备有允许这些楼层的乘客通过窗户离开和/或进入建筑物的设备。 设备可以与建筑物集成。 或者或另外,所述设备可以是便携式的并且在需要时被安装,例如在紧急情况期间。 替代的访问设备也可以用于其他应用。 例如,设备可以提供对距离地面相当远的结构(例如树屋或其他游戏结构)的访问。 本发明的进入装置包括一个安装在顶部的斜槽,安装在靠近窗户或其他提升开口的枢轴框架上,该滑槽具有连接或可独立展开的梯级梯子,以及可选地间隔开的支撑构件,例如环形,矩形或椭圆形环 。 阶梯的梯级为斜槽的网状材料提供了间隔。 储存可以在升高的结构的内墙中,部署可以半自动,可靠和平稳。

    Information handling system including a power supply unit with a switching regulator that reduces transient load release
    18.
    发明申请
    Information handling system including a power supply unit with a switching regulator that reduces transient load release 有权
    信息处理系统包括具有开关调节器的电源单元,其减少瞬时负载释放

    公开(公告)号:US20070029981A1

    公开(公告)日:2007-02-08

    申请号:US11195505

    申请日:2005-08-02

    IPC分类号: G05F1/00

    CPC分类号: H02M3/158

    摘要: An information handling system (“IHS”) includes a system board and a power supply unit coupled to the system board. The power supply unit includes a switching power regulator. The switching power regulator includes an inductor coupled to an output, a capacitor coupled to the inductor, a switch, coupled to the inductor, for regulating power supplied by the power supply unit in response to a duty cycle, and a control circuit, coupled to the switch, for supplying current to the inductor while the switch is closed and charging the capacitor while the switch is open.

    摘要翻译: 信息处理系统(“IHS”)包括耦合到系统板的系统板和电源单元。 电源单元包括开关电源调节器。 开关功率调节器包括耦合到输出的电感器,耦合到电感器的电容器,耦合到电感器的开关,用于响应于占空比来调节由电源单元提供的功率,以及控制电路,耦合到 该开关用于在开关闭合时向电感器提供电流,并且在开关断开时对电容器充电。

    Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
    19.
    发明授权
    Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same 有权
    用于调整时钟信号与与该时钟信号一起发送的相应数字信号之间的定时偏移的方法和系统,以及使用该时钟信号的存储器件和计算机系统

    公开(公告)号:US07159092B2

    公开(公告)日:2007-01-02

    申请号:US10686118

    申请日:2003-10-14

    IPC分类号: G06F1/12 G06F12/00

    摘要: A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to store the signals responsive to the clock. A phase command for each digital signal is stored in an associated storage circuit and defines a timing offset between the corresponding digital signal and the clock. The clock is output along with each digital signal having the timing offset defined by the corresponding phase command and the digital signals are captured responsive to the clock and evaluated to determine if each digital signal was successfully captured. A phase adjustment command adjusts the value of each phase command. These operations are repeated for a plurality of phase adjustment commands until respective final phase commands allowing all digital signals to be successfully captured is determined and stored in the storage circuits.

    摘要翻译: 一种方法和电路相对于数字信号相对于时钟输出自适应地调整数字信号的相应定时偏移,以使得锁存器可以接收数字信号以响应于时钟存储信号。 每个数字信号的相位指令被存储在相关联的存储电路中,并且定义相应的数字信号和时钟之间的定时偏移。 时钟与每个具有由相应相位指令定义的定时偏移的数字信号一起输出,并且响应于时钟捕获数字信号并进行评估以确定每个数字信号是否被成功捕获。 相位调整命令调整各相命令的值。 对于多个相位调整命令重复这些操作,直到允许成功捕获所有数字信号的各个最终相位命令被确定并存储在存储电路中。