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11.发明申请INTELLIGENT GPU MEMORY PRE-FETCHING AND GPU TRANSLATION LOOKASIDE BUFFER MANAGEMENT 有权智能GPU内存预处理和GPU翻译LOOKASIDE缓冲区管理公开(公告)号：US20150310580A1
公开(公告)日：2015-10-29
申请号：US14262500
申请日：2014-04-25
Applicant: Apple Inc.
Inventor： Derek R. Kumar
CPC classification number: G06F12/1027 , G06F12/1009 , G06F2212/654 , G06F2212/657
Abstract: A method and apparatus of a device that manages virtual memory for a graphics processing unit is described. In an exemplary embodiment, the device performs translation lookaside buffer coherency for a translation lookaside buffer of the graphics processing unit of the device. In this embodiment, the device receives a request to remove an entry of the translation lookaside buffer of the graphics processing unit, where the device includes a central processing unit and the graphics processing unit. In addition, the entry includes a translation of virtual memory address of a process to a physical memory address of system memory of a central processing unit and the graphics processing unit is executing a compute task of the process. The device locates the entry in the translation lookaside buffer and removes the entry.
Abstract translation: 描述了管理图形处理单元的虚拟存储器的设备的方法和装置。 在示例性实施例中，设备为设备的图形处理单元的翻译后备缓冲器执行翻译后备缓冲器一致性。 在本实施例中，设备接收去除图形处理单元的翻译后备缓冲器的条目的请求，其中该设备包括中央处理单元和图形处理单元。 此外，条目包括将进程的虚拟内存地址转换为中央处理单元的系统存储器的物理存储器地址，并且图形处理单元正在执行该进程的计算任务。 设备将条目定位在翻译后备缓冲区中，并删除条目。
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公开(公告)号：US11113113B2
公开(公告)日：2021-09-07
申请号：US15853239
申请日：2017-12-22
Applicant: Apple Inc.
Inventor： Derek R. Kumar , Thomas Brogan Duffy, Jr.
Abstract: Systems, apparatuses, and methods for efficiently selecting compressors for data compression are described. In various embodiments, a computing system includes at least one processor and multiple codecs such as one or more hardware codecs and one or more software codecs executable by the processor. The computing system receives a workload and processes instructions, commands and routines corresponding to the workload. One or more of the tasks in the workload are data compression tasks. Current condition(s) are determined during the processing of the workload by the computing system. Conditions are determined to be satisfied based on comparing current selected characteristics to respective thresholds. In one example, when the compressor selector determines a difference between a target compression ratio and an expected compression ratio of the first codec exceeds a threshold, the compressor selector switches from hardware codecs to software codecs.
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公开(公告)号：US11054873B2
公开(公告)日：2021-07-06
申请号：US16113397
申请日：2018-08-27
Applicant: Apple Inc.
Inventor： Derek R. Kumar
IPC: G06F1/20 , G06F1/3296 , G06F1/3206 , G06F1/3287 , G06F9/48 , G06F1/329 , G06F1/324
Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling central processing unit operations of the device is described. The device manages a thermal profile of the device by adjusting a throttling a central processing unit execution of a historically high energy consuming task. In this embodiment, the device monitors thermal level of the thermal profile of the device, the device is executing a plurality of tasks that utilize a plurality of processing cores of the device. If the thermal level of the device exceeds a thermal threshold, the device identifies one of the plurality of tasks as a historically high energy consuming task, and throttles this historically high energy consuming task by setting a force idle execution time for the historically high energy consuming task. The device further executes the plurality of tasks.
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公开(公告)号：US09904575B2
公开(公告)日：2018-02-27
申请号：US13895264
申请日：2013-05-15
Applicant: Apple, Inc.
Inventor： Derek R. Kumar
CPC classification number: G06F9/4843 , G06F9/4812 , G06F13/24 , G06F13/26 , Y02D10/14 , Y02D10/24
Abstract: A method and apparatus of a device that rate-limits the execution of a timer is described. The device receives a timer that includes an initial execution timer and a timer priority. If the timer priority is low, the device rate-limits the execution of the timer based on a suppression period associated with the timer priority. In order to rate-limit the execution of the timer, the device determines the suppression period based on the timer priority and schedules the timer to execute at the end of the suppression period. The device further schedules the timer to execute at the initial exertion time when the timer priority is high.
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公开(公告)号：US09530174B2
公开(公告)日：2016-12-27
申请号：US14503311
申请日：2014-09-30
Applicant: Apple Inc.
Inventor： Umesh Suresh Vaishampayan , Derek R. Kumar , Cecile Marie Foret , Anthony Graham Sumpter , Harshavardhan P. Gopalakrishnan , William E. Damon, III
CPC classification number: G06T1/20 , G06F1/206 , G06F9/4893 , G06T2200/28 , G09G5/363 , G09G2320/041 , G09G2330/021 , Y02D10/16
Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling graphics processing unit operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilizes a graphics processing unit of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first GPU utilization for the low priority process and maintains a second GPU utilization for the high priority process. The device further executes the low priority process using the first GPU utilization with the GPU and executes the high priority process using the second GPU utilization with the GPU.
Abstract translation: 描述了通过选择性地节流设备的图形处理单元操作来管理设备的热轮廓的设备的方法和装置。 在示例性实施例中，设备监视设备的热剖面，其中设备执行利用设备的图形处理单元的多个处理。 另外，多个处理包括高优先级处理和低优先级处理。 如果设备的热分布超过热阈值，则设备会降低低优先级进程的第一GPU利用率，并为高优先级进程维护第二GPU利用率。 该设备还使用GPU的第一GPU利用率执行低优先级进程，并且使用与GPU的第二GPU利用率执行高优先级进程。
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Patent Agency Ranking
公开(公告)号：US20160077987A1
公开(公告)日：2016-03-17
申请号：US14867770
申请日：2015-09-28
Applicant: Apple Inc.
Inventor： Derek R. Kumar , Joshua Phillips de Cesare
CPC classification number: G06F13/24 , G06F1/3293 , G06F9/4418 , Y02D10/14
Abstract: A data processing system includes, in one embodiment, at least a first processor and a second processor and an interrupt controller, and the system provides a deferred inter-processor interrupt (IPI) that can be used to wake up the second processor from a low power sleep state. The deferred IPI is, in one embodiment, delayed by a timer in the interrupt controller, and the deferred WI can be cancelled by the first processor if the first processor becomes available to execute a thread that was made runnable by an interrupt which triggered the deferred IPI.
Abstract translation: 在一个实施例中，数据处理系统包括至少第一处理器和第二处理器以及中断控制器，并且系统提供延迟的处理器间中断（IPI），其可用于将第二处理器从低 电力睡眠状态。 在一个实施例中，延迟IPI在中断控制器中被定时器延迟，并且如果第一处理器变得可用于执行可由触发延迟的中断的线程可用的线程，则延迟WI可被第一处理器取消 IPI。
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公开(公告)号：US20150309940A1
公开(公告)日：2015-10-29
申请号：US14262475
申请日：2014-04-25
Applicant: Apple Inc.
Inventor： Derek R. Kumar
CPC classification number: G06F12/0804 , G06F12/1009 , G06F12/1045 , G06F2212/1041 , G06F2212/455 , G06F2212/657 , G06F2212/68
Abstract: A method and apparatus of a device that manages virtual memory for a graphics processing unit is described. In an exemplary embodiment, the device manages a graphics processing unit working set of pages. In this embodiment, the device determines the set of pages of the device to be analyzed, where the device includes a central processing unit and the graphics processing unit. The device additionally classifies the set of pages based on a graphics processing unit activity associated with the set of pages and evicts a page of the set of pages based on the classifying.
Abstract translation: 描述了管理图形处理单元的虚拟存储器的设备的方法和装置。 在示例性实施例中，设备管理图形处理单元工作页面集合。 在本实施例中，设备确定要分析的设备的页面集合，其中设备包括中央处理单元和图形处理单元。 该设备还基于与该组页面相关联的图形处理单元活动来对页面集进行分类，并且基于分类来逐出该页面页面。
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公开(公告)号：US11768690B2
公开(公告)日：2023-09-26
申请号：US17532072
申请日：2021-11-22
Applicant: Apple Inc.
Inventor： Aditya Kesiraju , Andrew J. Beaumont-Smith , Brian P. Lilly , James Vash , Jason M. Kassoff , Krishna C. Potnuru , Rajdeep L. Bhuyar , Ran A. Chachick , Tyler J. Huberty , Derek R. Kumar
CPC classification number: G06F9/3877 , G06F9/3009 , G06F9/3836 , G06F9/3863 , G06F9/3881 , G06F9/4887 , G06F11/3024 , G06F9/3879
Abstract: A system may include a plurality of processors and a coprocessor. A plurality of coprocessor context priority registers corresponding to a plurality of contexts supported by the coprocessor may be included. The plurality of processors may use the plurality of contexts, and may program the coprocessor context priority register corresponding to a context with a value specifying a priority of the context relative to other contexts. An arbiter may arbitrate among instructions issued by the plurality of processors based on the priorities in the plurality of coprocessor context priority registers. In one embodiment, real-time threads may be assigned higher priorities than bulk processing tasks, improving bandwidth allocated to the real-time threads as compared to the bulk tasks.
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公开(公告)号：US11360812B1
公开(公告)日：2022-06-14
申请号：US16723418
申请日：2019-12-20
Applicant: Apple Inc.
Inventor： Derek R. Kumar
IPC: G06F9/48 , G06F9/38 , G06F12/0891 , G06F9/30
Abstract: Techniques are disclosed relating to preventing a process from using state information to control a flow of execution of different process. Accordingly, a processor of a computing device may execute a first process and store state information usable to facilitate speculative execution of that first process. An operating system of the computing device may determine whether the first process is trusted by the operating system. The operating system may further schedule a second process for execution of the processor after executing the first process. In response to determining that the first process is not trusted, the operating system may cause the processor to execute one or more instructions before executing the second process. These one or more instructions may prevent the stored state information of the first process from affecting execution of the second process.
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公开(公告)号：US11336294B2
公开(公告)日：2022-05-17
申请号：US15491740
申请日：2017-04-19
Applicant: Apple Inc.
Inventor： Derek R. Kumar , Thomas Brogan Duffy, Jr.
Abstract: A method and apparatus of a device that compresses an object stored in memory is described. In an exemplary embodiment, the device receives an indication that the object is to be compressed. The device further selects one of a plurality of compression algorithms based on at least a characteristic of the object. In addition, the device compresses the object in-memory using the selected compression algorithm.
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