公开(公告)号：US20230304183A1

公开(公告)日：2023-09-28

申请号：US18118336

申请日：2023-03-07

Applicant: Applied Materials, Inc.

Inventor： Marvin Louis BERNT ,  Jon WOODYARD ,  Niranjan KHASGIWALE ,  Vincent DICAPRIO

IPC: C25D5/02 ,  H01L21/288 ,  H01L21/66 ,  C25D21/12 ,  G03F1/70

CPC classification number: C25D5/022 ,  H01L21/2885 ,  H01L22/12 ,  C25D21/12 ,  G03F1/70

Abstract: Methods and apparatus for electroplating a substrate incorporate aspects of digital lithography and feedback from electroplating processes to improve characteristics of plating material based on die patterns. In some embodiments, a method of electroplating a substrate may include receiving a die design, forming a first lithographic pattern for a first substrate based on the die design, using a digital lithography process to pattern the first substrate with the first lithographic pattern, using an electroplating process to deposit material on the first substrate, using a metrology process to determine at least one parameter of the deposited material on the first substrate, and forming a second lithographic pattern from the first lithographic pattern for a second substrate based, at least in part, on the at least one parameter received directly from the metrology process on the first substrate by the digital lithographic process for the second substrate.

公开(公告)号：US20210257307A1

公开(公告)日：2021-08-19

申请号：US17227983

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Guan Huei SEE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

公开(公告)号：US20210257306A1

公开(公告)日：2021-08-19

申请号：US17227811

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

公开(公告)号：US20210257289A1

公开(公告)日：2021-08-19

申请号：US17227837

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Kurtis LESCHKIES ,  Roman GOUK ,  Chintan BUCH ,  Vincent DICAPRIO ,  Bernhard STONAS ,  Jean DELMAS

IPC: H01L23/498 ,  H01L23/14 ,  H01L21/48

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US20210249345A1

公开(公告)日：2021-08-12

申请号：US17227867

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Kurtis LESCHKIES ,  Roman GOUK ,  Chintan BUCH ,  Vincent DICAPRIO ,  Bernhard STONAS ,  Jean DELMAS

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/14

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US20210159158A1

公开(公告)日：2021-05-27

申请号：US16698680

申请日：2019-11-27

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Kurtis LESCHKIES ,  Roman GOUK ,  Chintan BUCH ,  Vincent DICAPRIO

IPC: H01L23/498 ,  H01L23/14 ,  H01L21/48

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.