DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND THREE-DIMENSIONAL DISPLAY APPARATUS

    公开(公告)号:US20230165098A1

    公开(公告)日:2023-05-25

    申请号:US17754225

    申请日:2021-05-08

    IPC分类号: H10K59/35 H10K59/80 G02B30/26

    摘要: The present disclosure provides a display substrate, a manufacturing method thereof and a three-dimensional display apparatus. The display substrate includes a base substrate with a plurality of sub-pixels. Each of the sub-pixels includes at least two first electrodes, and a light-emitting function layer disposed on a side of the first electrodes facing away from the base substrate. Each first electrode includes: a transparent conductive portion and a reflective conductive portion arranged in stack. In at least one of the sub-pixels, two adjacent first electrodes correspond to one reflective structure, the reflective structure includes a first portion and a second portion, an orthographic projection of the first portion on the base substrate and an orthographic projection of one first electrode have an overlap area, and an orthographic projection of the second portion on the base substrate an orthographic projection of another first electrode have an overlap area.

    ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20230163145A1

    公开(公告)日:2023-05-25

    申请号:US16965495

    申请日:2019-07-22

    IPC分类号: H01L27/12

    CPC分类号: H01L27/1288 H01L27/1248

    摘要: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

    ARRAY SUBSTRATE AND SPLICING SCREEN

    公开(公告)号:US20220293018A1

    公开(公告)日:2022-09-15

    申请号:US17508866

    申请日:2021-10-22

    IPC分类号: G09F9/302 H01L33/62 G09F9/33

    摘要: The present application discloses an array substrate and a splicing screen. The array substrate provided by an embodiment of the present application includes: a flexible base, wherein the flexible base includes a display region, a first region and a second region, the display region and at least one of the first region and the second region are located in different planes, and the first region is located between the display region and the second region; a plurality of signal lines, arranged on the display region and the first region; a plurality of fan-out lines, arranged on the second region and connected with the plurality of signal lines in a one-to-one correspondence; and a buffer cushion, arranged on the first region, wherein an orthographic projection of the buffer cushion on the flexible base does not overlap with orthographic projections of the signal lines on the flexible base.

    OLED DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20220255025A1

    公开(公告)日:2022-08-11

    申请号:US17732781

    申请日:2022-04-29

    IPC分类号: H01L51/00 H01L27/32

    摘要: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.