-
公开(公告)号：US20110255612A1
公开(公告)日：2011-10-20
申请号：US13032520
申请日：2011-02-22
IPC分类号： H04L27/00
CPC分类号： H03M13/6597 , H03M13/1111
摘要： A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
摘要翻译： 处理器实现节点之间的功能节点和通信路径的网络。 处理器包括处理器的功能节点的多个电路实现; 以及实现链接节点的电路实现的通信路径的多个信号路径。 至少一些信号路径被配置为传递根据信号路径上的信号电平的时间模式表示的信号值。 处理器还包括用于在表示为信号电平（例如，电压或电流电平）的信号值和表示为时间模式的信号值之间进行转换的多个电路部件。
-
公开(公告)号：US20100246287A1
公开(公告)日：2010-09-30
申请号：US12537045
申请日：2009-08-06
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
-
公开(公告)号：US09036420B2
公开(公告)日：2015-05-19
申请号：US13471816
申请日：2012-05-15
申请人： Benjamin Vigoda , Jeffrey Bernstein , Jeffrey Venuti , Alexander Alexeyev , Eric Nestler , David Reynolds , William Bradley , Vladimir Zlatkovic
发明人： Benjamin Vigoda , Jeffrey Bernstein , Jeffrey Venuti , Alexander Alexeyev , Eric Nestler , David Reynolds , William Bradley , Vladimir Zlatkovic
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
-
公开(公告)号：US20140114443A1
公开(公告)日：2014-04-24
申请号：US13187466
申请日：2011-07-20
申请人： Jeffrey Bernstein , Benjamin Vigoda
发明人： Jeffrey Bernstein , Benjamin Vigoda
IPC分类号： G06N5/04
CPC分类号： G06N5/04 , G06N3/0635
摘要： An inference task is performed using a computation device having a plurality of processing elements operable in parallel and connected via a connectivity system. Performing the task includes accepting at the device a specification of at least part of the inference task. The specification characterizes a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. Each of the processing elements is configured with data defining one or more of the plurality of factors. At each of the processing elements, computation associated with one of the factors is performed concurrently with other of the processing elements performing computation associated with different ones of the factors. Messages are exchanged via a connectivity system. The messages provide inputs and/or outputs to the processing elements for the computations associated with the factors and provide a result of performing of the at least the part of the inference task.
摘要翻译： 使用具有可并行操作并通过连接系统连接的多个处理元件的计算装置执行推理任务。 执行任务包括在设备处接受至少部分推理任务的规范。 规范表征多个变量和多个因素，每个因素与变量的子集相关联。 每个处理元件配置有定义多个因素中的一个或多个的数据。 在每个处理元件中，与其中一个因素相关联的计算与执行与不同因素的计算相关联的其他处理元件同时执行。 消息通过连接系统进行交换。 这些消息向处理元件提供用于与因素相关联的计算的输入和/或输出，并提供执行推断任务的至少一部分的结果。
-
公开(公告)号：US20100223225A1
公开(公告)日：2010-09-02
申请号：US12716155
申请日：2010-03-02
IPC分类号： G06N5/04
CPC分类号： G06N7/005
摘要： Some general aspects relate to systems and methods of analog computation using numerical representation with uncertainty. For example, a specification of a group of variables is accepted, with each variable having a set of at least N possible values. The group of variables satisfies a set of one or more constraints, and each variable is specified as a decomposition into a group of constituents, with each constituent having a set of M (e.g., M
摘要翻译： 一些一般方面涉及使用具有不确定性的数值表示的模拟计算的系统和方法。 例如，接受一组变量的规范，每个变量具有至少N个可能值的集合。 变量组满足一个或多个约束的集合，并且每个变量被指定为分组成一组成分，其中每个组成部分具有一组M（例如，M
-
公开(公告)号：US09563851B2
公开(公告)日：2017-02-07
申请号：US13491212
申请日：2012-06-07
申请人： Jeffrey Bernstein , Benjamin Vigoda , Kartik Nanda , Rishi Chaturvedi , David Hossack , William Peet , Andrew Schweitzer , Timothy Caputo
发明人： Jeffrey Bernstein , Benjamin Vigoda , Kartik Nanda , Rishi Chaturvedi , David Hossack , William Peet , Andrew Schweitzer , Timothy Caputo
摘要： In an aspect, in general, a programmable computation device performs computations of an inference task specified by a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. The device includes one or more processing elements. Each processing element includes a first storage for a definition of a factor, a second storage for data associated with the inputs and/or outputs of at least some of the computations, and one or more computation units coupled to the first storage and the second storage for performing a succession of parts of the at least some of the computations that are associated with a factor, the succession of parts defined by data in the storage for the definition of the factor.
摘要翻译： 一方面，通常，可编程计算装置执行由多个变量和多个因素指定的推理任务的计算，每个因子与变量的子集相关联。 该装置包括一个或多个处理元件。 每个处理元件包括用于定义因子的第一存储器，用于与至少一些计算的输入和/或输出相关联的数据的第二存储器以及耦合到第一存储器和第二存储器的一个或多个计算单元 用于执行与因素相关联的所述至少一些计算的一部分的连续的部分，所述部分由所述存储器中的数据由所述因子的定义定义的部分所定义。
-
公开(公告)号：US08572144B2
公开(公告)日：2013-10-29
申请号：US12716113
申请日：2010-03-02
摘要： A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections. The input transformation circuit is configurable to transform the input of the signal processing circuit for controlling a mapping characteristic from the input to the set of outputs.
摘要翻译： 电路包括用于接受输入并产生一组输出的信号处理电路。 在具有一组代表值的输入范围中提供输入，并且每个输出表示输入与一个或多个代表值的关联度量。 信号处理电路包括一组输出部分，每个输出部分响应信号处理电路的输入。 每个输出部分包括一个或多个S形发生器。 每个S形发生器响应于输出部分的输入以产生表示输出部分的输入的S形功能的输出。 每个输出部分还包括用于组合一个或多个S形发生器的输出以形成信号处理电路的一组输出的电路。 输入变换电路耦合到多个输出部分。 输入变换电路可配置为变换信号处理电路的输入，用于控制从输入到输出组的映射特性。
-
公开(公告)号：US20120317065A1
公开(公告)日：2012-12-13
申请号：US13491212
申请日：2012-06-07
申请人： Jeffrey Bernstein , Benjamin Vigoda
发明人： Jeffrey Bernstein , Benjamin Vigoda
摘要： In an aspect, in general, a programmable computation device performs computations of an inference task specified by a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. The device includes one or more processing elements. Each processing element includes a first storage for a definition of a factor, a second storage for data associated with the inputs and/or outputs of at least some of the computations, and one or more computation units coupled to the first storage and the second storage for performing a succession of parts of the at least some of the computations that are associated with a factor, the succession of parts defined by data in the storage for the definition of the factor.
摘要翻译： 一方面，通常，可编程计算装置执行由多个变量和多个因素指定的推理任务的计算，每个因子与变量的子集相关联。 该装置包括一个或多个处理元件。 每个处理元件包括用于定义因子的第一存储器，用于与至少一些计算的输入和/或输出相关联的数据的第二存储器以及耦合到第一存储器和第二存储器的一个或多个计算单元 用于执行与因素相关联的所述至少一些计算的一部分的连续的部分，所述部分由所述存储器中的数据由所述因子的定义定义的部分所定义。
-
公开(公告)号：US20120194375A1
公开(公告)日：2012-08-02
申请号：US13095188
申请日：2011-04-27
IPC分类号： H03M1/12
CPC分类号： G06J1/00
摘要： An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
摘要翻译： 基于输入范围的分区来转换模拟值的方法产生在例如基于输入的噪声版本的情况下在每个区域内发现输入的概率。 在一些示例中，使用比较电路的迭代和/或流水线应用来累积输出概率的一组模拟表示。 电路可以根据劣化的特性进行调整或配置（例如，根据加性噪声的变化）和/或关于干净输入分布的先前信息（例如，在离散的一组样本值上的分布 ，均匀分布等）。
-
公开(公告)号：US20100281089A1
公开(公告)日：2010-11-04
申请号：US12716113
申请日：2010-03-02
摘要： A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections. The input transformation circuit is configurable to transform the input of the signal processing circuit for controlling a mapping characteristic from the input to the set of outputs.
摘要翻译： 电路包括用于接受输入并产生一组输出的信号处理电路。 在具有一组代表值的输入范围中提供输入，并且每个输出表示输入与一个或多个代表值的关联度量。 信号处理电路包括一组输出部分，每个输出部分响应信号处理电路的输入。 每个输出部分包括一个或多个S形发生器。 每个S形发生器响应于输出部分的输入以产生表示输出部分的输入的S形功能的输出。 每个输出部分还包括用于组合一个或多个S形发生器的输出以形成信号处理电路的一组输出的电路。 输入变换电路耦合到多个输出部分。 输入变换电路可配置为变换信号处理电路的输入，用于控制从输入到输出组的映射特性。
-
-
-
-
-
-
-
-
-
搜索结果
42 条记录 (耗时 0.03 秒)
