公开(公告)号：US08395164B2

公开(公告)日：2013-03-12

申请号：US13225826

申请日：2011-09-06

申请人： Brian Murphy ,  Reinhold Wahlich

发明人： Brian Murphy ,  Reinhold Wahlich

IPC分类号： H01L29/15

CPC分类号： H01L21/76254

摘要： Silicon carbide substrate wafers are prepared by transferring a monocrystalline silicon layer from a donor wafer onto a handle wafer, the silicon layer being implanted with carbon and annealed to form a monocrystalline SiC layer prior to or after transfer of the silicon layer.

摘要翻译： 通过将单晶硅层从施主晶片转移到处理晶片上来制备碳化硅衬底晶片，硅层被注入碳并在硅层转移之前或之后退火以形成单晶SiC层。

公开(公告)号：US20060202310A1

公开(公告)日：2006-09-14

申请号：US11384887

申请日：2006-03-20

申请人： Brian Murphy ,  Reinhold Wahlich ,  Rudiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

发明人： Brian Murphy ,  Reinhold Wahlich ,  Rudiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

IPC分类号： H01L29/06

CPC分类号： H01L21/3223 ,  H01L21/76251

摘要： SOI wafers are manufactured to have very thin device layers of high surface quality. The layer is ≦ 20 nm in thickness, has an HF density of ≦ 0.1/cm2, and a surface roughness of 0.2 nm RMS.

摘要翻译： SOI晶片被制造成具有非常薄的高表面质量的器件层。 该层的厚度<20nm，HF密度<= 0.1 / CM <2>，表面粗糙度为0.2nm RMS。

公开(公告)号：US08039361B2

公开(公告)日：2011-10-18

申请号：US12438818

申请日：2007-08-22

申请人： Brian Murphy ,  Reinhold Wahlich

发明人： Brian Murphy ,  Reinhold Wahlich

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/76254

摘要： The invention relates to a process for manufacturing a multilayered semiconductor wafer comprising a handle wafer (5) and a layer (40) comprising silicon carbide bonded to the handle wafer (5), the process comprising the steps of: a) providing a handle wafer (5), b) providing a donor wafer (1) comprising a donor layer (2) and a remainder (3) of the donor wafer, the donor layer (2) comprising monocrystalline silicon, e) bonding the donor layer (2) of the donor wafer (1) to the handle wafer (5), and f) removing the remainder (3) of the donor wafer in order to expose the donor layer (2) which remains bonded to the handle wafer (5), the process being characterized by further steps of c) implanting carbon ions into the donor layer (2) in order to produce a layer (4) comprising implanted carbon, and d) heat-treating the donor layer (2) comprising the layer (4) comprising implanted carbon in order to form a silicon carbide donor layer (44) in at least part of the donor layer (2). The invention also relates to a multilayered semiconductor wafer comprising a handle wafer (5) and a silicon carbide donor layer (44) which is bonded to the handle wafer (5), wherein the silicon carbide donor layer (44) is free of twins and free of additional silicon carbide polytypes, as determined by X-ray diffraction.

摘要翻译： 本发明涉及一种用于制造多层半导体晶片的方法，其包括处理晶片（5）和包含结合到所述处理晶片（5）的碳化硅的层（40），所述方法包括以下步骤：a）提供处理晶片 （5），b）提供包括施主晶片的施主层（2）和剩余部分（3）的施主晶片（1），施主层（2）包括单晶硅，e）将施主层（2） 以及f）去除施主晶片的剩余部分（3），以便露出与晶片（5）保持接合的施主层（2），所述施主晶片（1） 方法的特征在于进一步的步骤，c）将碳离子注入施主层（2）以产生包含植入碳的层（4），和d）热处理包含该层（4）的施主层（2） 包括植入碳以便在施主层（2）的至少一部分中形成碳化硅施体层（44）。 本发明还涉及包括处理晶片（5）和结合到处理晶片（5）的碳化硅施体层（44）的多层半导体晶片，其中碳化硅施体层（44）不含双胞胎， 没有额外的碳化硅多型，通过X射线衍射测定。

公开(公告)号：US07803695B2

公开(公告)日：2010-09-28

申请号：US12270042

申请日：2008-11-13

申请人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

发明人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

IPC分类号： H01L21/30

CPC分类号： H01L21/187 ,  H01L21/3065 ,  H01L21/324 ,  H01L21/76251

摘要： A process for producing a semiconductor substrate comprising a carrier wafer and a layer of single-crystalline semiconductor material:a) producing a layer containing recesses at the surface of a donor wafer of single-crystalline semiconductor material,b) joining the surface of the donor wafer containing recesses to the carrier wafer,c) heat treating to close the recesses at the interface between the carrier wafer and the donor wafer to form a layer of cavities within the donor wafer, andd) splitting the donor wafer along the layer of cavities, resulting in a layer of semiconductor material on the carrier wafer. Semiconductor substrates prepared thusly may have a single-crystalline semiconductor layer having a thickness of 100 nm or less, a layer thickness uniformity of 5% or less, and an HF defect density of 0.02/cm2 or less.

摘要翻译： 一种制造半导体衬底的方法，包括载体晶片和单晶半导体材料层：a）在单晶半导体材料的施主晶片的表面上产生包含凹陷的层，b）将所述供体的表面 晶片容纳凹槽到载体晶片，c）热处理以关闭在载体晶片和施主晶片之间的界面处的凹槽，以在施主晶片内形成一层空腔，以及d）沿着该空腔层分裂供体晶片 ，从而在载体晶片上产生一层半导体材料。 因此制备的半导体衬底可以具有厚度为100nm以下，层厚均匀度为5％以下，HF缺陷密度为0.02 / cm 2以下的单晶半导体层。

公开(公告)号：US07799692B2

公开(公告)日：2010-09-21

申请号：US11749938

申请日：2007-05-17

申请人： Brian Murphy ,  Diego Feijóo ,  Reinhold Wahlich

发明人： Brian Murphy ,  Diego Feijóo ,  Reinhold Wahlich

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/30604 ,  C30B29/06 ,  C30B33/005 ,  G01B11/0641 ,  G01B11/0675 ,  G01B11/0683 ,  G01B11/306 ,  H01L22/12 ,  H01L22/20

摘要： Treatment of a semiconductor wafer employs: a) position-dependent measuring of a parameter characterizing the semiconductor wafer to determine a position-dependent value of the parameter over an entire surface of the semiconductor wafer, b) oxidizing the entire surface of the semiconductor wafer under the action of an oxidizing agent with simultaneous exposure of the entire surface, the oxidation rate and thus the thickness of the resulting oxide layer dependent on the light intensity at the surface of the semiconductor wafer, and c) removing of the oxide layer, the light intensity in step b) predefined in a position-dependent manner such that differences in the position-dependent values of the parameter measured are reduced by the position-dependent oxidation rate resulting in step b) and subsequent removal of the oxide layer in step c).

摘要翻译： 半导体晶片的处理采用：a）表征半导体晶片的参数的位置相关测量，以确定参数在半导体晶片的整个表面上的位置相关值，b）氧化半导体晶片的整个表面 氧化剂同时暴露整个表面的氧化速率，氧化速率以及所得氧化物层的厚度取决于半导体晶片的表面处的光强度，以及c）去除氧化物层，光 步骤b）中的强度以位置相关方式预定义，使得所测量的参数的位置相关值的差异通过位置依赖氧化速率降低，导致步骤b）并随后在步骤c）中去除氧化物层， 。

公开(公告)号：US07417297B2

公开(公告)日：2008-08-26

申请号：US11384887

申请日：2006-03-20

申请人： Brian Murphy ,  Reinhold Wahlich ,  Rüdiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

发明人： Brian Murphy ,  Reinhold Wahlich ,  Rüdiger Schmolke ,  Wilfried Von Ammon ,  James Moreland

IPC分类号： H01L29/06

CPC分类号： H01L21/3223 ,  H01L21/76251

摘要： SOI wafers are manufactured to have very thin device layers of high surface quality. The layer is ≦20 nm in thickness, has an HF density of ≦0.1/cm2, and a surface roughness of 0.2 nm RMS.

摘要翻译： SOI晶片被制造成具有非常薄的高表面质量的器件层。 该层的厚度<20nm，HF密度<= 0.1 / CM <2>，表面粗糙度为0.2nm RMS。

公开(公告)号：US20070281441A1

公开(公告)日：2007-12-06

申请号：US11775475

申请日：2007-07-10

申请人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

发明人： Dirk Dantz ,  Andreas Huber ,  Reinhold Wahlich ,  Brian Murphy

IPC分类号： H01L21/20

CPC分类号： H01L21/76251 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02658

摘要： A semiconductor substrate useful as a donor wafer is a single-crystal silicon wafer having a relaxed, single-crystal layer containing silicon and germanium on its surface, the germanium content at the surface of the layer being in the range from 10% by weight to 100% by weight, and a layer of periodically arranged cavities below the surface. The invention also relates to a process for producing this semiconductor substrate and to an sSOI wafer produced from this semiconductor substrate.

摘要翻译： 可用作施主晶片的半导体衬底是其表面上具有含有硅和锗的松弛的单晶层的单晶硅晶片，该层表面的锗含量在10重量％至 100重量％，以及在表面下面的周期性排列的空腔层。 本发明还涉及一种用于制造该半导体衬底和由该半导体衬底制造的sSOI晶片的方法。

公开(公告)号：US20080188084A1

公开(公告)日：2008-08-07

申请号：US12023223

申请日：2008-01-31

申请人： Diego Feijoo ,  Oliver Riemenschneider ,  Reinhold Wahlich

发明人： Diego Feijoo ,  Oliver Riemenschneider ,  Reinhold Wahlich

IPC分类号： H01L21/302

CPC分类号： H01L21/30604

摘要： To reduce and homogenize the thickness of a semiconductor layer which lies on the surface of an electrically insulating material, the surface of the semiconductor layer is exposed to the action of an etchant whose redox potential is adjusted as a function of the material and the desired final thickness of the semiconductor layer, so that the material erosion per unit time on the surface of the semiconductor layer due to the etchant becomes less as the thickness of the semiconductor layer decreases, and is only from 0 to 10% of the thickness per second when the desired thickness is reached. The method is carried out without the action of light or the application of an external electrical voltage.

摘要翻译： 为了减少和均匀化位于电绝缘材料表面上的半导体层的厚度，半导体层的表面暴露于蚀刻剂的作用，其氧化还原电位作为材料和期望的最终值的函数被调整 半导体层的厚度，使得由于蚀刻剂在半导体层的表面上的每单位时间的材料侵蚀随着半导体层的厚度减小而变小，并且仅仅是每秒厚度的0至10％ 达到所需的厚度。 该方法在没有光的作用或施加外部电压的情况下进行。

公开(公告)号：US07122865B2

公开(公告)日：2006-10-17

申请号：US10853322

申请日：2004-05-25

申请人： Robert Hölzl ,  Dirk Dantz ,  Andreas Huber ,  Ulrich Lambert ,  Reinhold Wahlich

发明人： Robert Hölzl ,  Dirk Dantz ,  Andreas Huber ,  Ulrich Lambert ,  Reinhold Wahlich

IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC分类号： H01L21/2007 ,  H01L21/76254

摘要： An SOI wafer, includes a substrate made from silicon, an electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) and a single-crystal silicon layer with a thickness of from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm2.A process is for producing an SOI wafer of this type, in which a substrate wafer made from silicon is joined to a donor wafer via a layer of the electrically insulating material which has previously been applied. The donor wafer bears a donor layer of single-crystal silicon, with a concentration of vacancies of at most 1012/cm3 and of vacancy agglomerates of at most 105/cm3. After the wafers have been joined, the thickness of the donor wafer is reduced in such a manner that the single-crystal silicon layer having these properties is formed from the donor layer, this single-crystal silicon layer being joined to the substrate wafer via the layer of electrically insulating material.

摘要翻译： SOI晶片包括由硅制成的衬底，具有至少1.6W /（Km）的热导率和厚度为10nm至10μm的单晶硅层的电绝缘层，标准偏差 从平均层厚度至多5％，密度至多为0.5HF缺陷/ cm 2。 一种制造这种SOI晶片的方法，其中由硅制成的衬底晶片通过预先施加的电绝缘材料层与施主晶片接合。 供体晶片承载单晶硅的施主层，其空位浓度至多为10 12 / cm 3，空位团聚体最多为10 ^{5/3/3。 在晶片已经接合之后，施主晶片的厚度被减小，使得具有这些性质的单晶硅层由施主层形成，该单晶硅层通过该晶体管接合到衬底晶片 电绝缘材料层。}

公开(公告)号：US5164323A

公开(公告)日：1992-11-17

申请号：US581274

申请日：1990-09-12

申请人： Gerhard Brehm ,  Helene Prigge ,  Reinhold Wahlich

发明人： Gerhard Brehm ,  Helene Prigge ,  Reinhold Wahlich

IPC分类号： H01L21/322

CPC分类号： H01L21/3221

摘要： Semiconductor slices, in particular having the surface polished on both ss, can be provided with a surface which effects the formation of gettering centers. These centers include stacking faults and/or dislocation networks in subsequent thermal treatment steps by a pressure loading being exerted on them with the aid of an elastic pressure transmission medium which causes local pressure inhomogeneities. A material erosion, for example in the form of scratches, is not necessary in this process. Advantageously, the treatment is carried out during a template polishing step in which a suitable pressure transmission medium is in contact with the rear side of the slice. The process makes available semiconductor slices with gettering action on one side which have a high surface quality on both sides.

摘要翻译： 特别是在两侧具有抛光表面的半导体切片可以具有形成吸气中心的表面。 这些中心在随后的热处理步骤中包括堆垛层错和/或位错网络，其中借助于导致局部压力不均匀性的弹性压力传递介质施加在其上的压力负载。 在这个过程中不需要材料侵蚀，例如划痕的形式。 有利地，在模板研磨步骤期间进行处理，其中合适的压力传递介质与切片的后侧接触。 该方法使半导体片具有在两面具有高表面质量的一面具有吸气作用。