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19 条记录 (耗时 0.017 秒)

    Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape
    11.
    发明授权
    Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape 失效
    用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置，以及形成穿孔切割带

    公开(公告)号：US07465142B2

    公开(公告)日：2008-12-16

    申请号：US10981468

    申请日：2004-11-05

    申请人： Cheol-Joon Yoo

    发明人： Cheol-Joon Yoo

    IPC分类号： B65B21/02

    CPC分类号： H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327

    摘要： A method and apparatus for picking up a semiconductor chip, a method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape are provided. Air may be blown through air holes in a dicing tape to at least partially separate the semiconductor chip from the dicing tape and/or create a space between the semiconductor chip to weaken the adhesion of the dicing tape to the semiconductor chip. The semiconductor chip may then be picked up by a removal member and completely removed from the dicing tape. Semiconductor chips that are not to be removed may be vacuum-suctioned to the dicing tape. UV radiation or heat may be applied to weaken the adhesion of the dicing tape. The semiconductor chip may be detected by an optical detector. Removing the semiconductor chips by air reduces stress and damage to the semiconductor chips.

    摘要翻译： 提供一种用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置以及形成穿孔切割带的方法。 空气可以通过切割带中的空气孔吹入，以将半导体芯片与切割带至少部分分离和/或在半导体芯片之间产生空间，以削弱切割带对半导体芯片的粘附。 半导体芯片然后可以由去除构件拾取并从切割带完全移除。 不要去除的半导体芯片可以被真空吸附到切割带上。 可以施加UV辐射或热量以削弱切割胶带的粘附。 半导体芯片可以由光学检测器检测。 用空气去除半导体芯片减少对半导体芯片的压力和损坏。

    Semiconductor device and method of packaging the same
    12.
    发明授权
    Semiconductor device and method of packaging the same 有权
    半导体装置及其封装方法

    公开(公告)号：US07129585B2

    公开(公告)日：2006-10-31

    申请号：US10753827

    申请日：2004-01-05

    申请人： Cheol-Joon Yoo

    发明人： Cheol-Joon Yoo

    IPC分类号： H01L23/48

    CPC分类号： H01L21/563 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

    摘要： Embodiments of the invention provide a semiconductor-chip mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device. According to some embodiments, when a semiconductor chip is mounted on the mounting body as a flip-chip type, an encapsulation process using an encapsulation resin is not required. In some embodiments, the mounting body includes a substrate formed of a polyimide film, a conductive pattern formed of copper, a protection layer pattern formed of PSR, and an adhesive pattern formed on the protection layer pattern. The adhesive pattern can be formed of an insulating material. A plurality of holes, into which a plurality of bumps formed on the semiconductor chip are inserted to be connected to the conductive pattern, are formed in the protection layer pattern and the adhesive pattern.

    摘要翻译： 本发明的实施例提供一种半导体芯片安装体，包括该安装体的半导体器件，以及一种封装半导体器件的方法。 根据一些实施例，当半导体芯片作为倒装型安装在安装体上时，不需要使用封装树脂的封装工艺。 在一些实施例中，安装体包括由聚酰亚胺膜形成的基板，由铜形成的导电图案，由PSR形成的保护层图案以及形成在保护层图案上的粘合图案。 粘合剂图案可以由绝缘材料形成。 在保护层图案和粘合剂图案中形成有在半导体芯片上形成的多个凸块插入以连接到导电图案的多个孔。

    Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape
    14.
    发明申请
    Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape 失效
    用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置，以及形成穿孔切割带

    公开(公告)号：US20050095100A1

    公开(公告)日：2005-05-05

    申请号：US10981468

    申请日：2004-11-05

    申请人： Cheol-Joon Yoo

    发明人： Cheol-Joon Yoo

    IPC分类号： H01L21/50 ,  H01L21/00 ,  H01L21/68 ,  B65B21/02 ,  B65B69/00 ,  B65G65/04 ,  B65G65/34

    CPC分类号： H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327

    摘要： A method and apparatus for picking up a semiconductor chip, a method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape are provided. Air may be blown through air holes in a dicing tape to at least partially separate the semiconductor chip from the dicing tape and/or create a space between the semiconductor chip to weaken the adhesion of the dicing tape to the semiconductor chip. The semiconductor chip may then be picked up by a removal member and completely removed from the dicing tape. Semiconductor chips that are not to be removed may be vacuum-suctioned to the dicing tape. UV radiation or heat may be applied to weaken the adhesion of the dicing tape. The semiconductor chip may be detected by an optical detector. Removing the semiconductor chips by air reduces stress and damage to the semiconductor chips.

    摘要翻译： 提供一种用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置以及形成穿孔切割带的方法。 空气可以通过切割带中的空气孔吹入，以将半导体芯片与切割带至少部分分离和/或在半导体芯片之间产生空间，以削弱切割带对半导体芯片的粘附。 半导体芯片然后可以由去除构件拾取并从切割带完全移除。 不要去除的半导体芯片可以被真空吸附到切割带上。 可以施加UV辐射或热量以削弱切割胶带的粘附。 半导体芯片可以由光学检测器检测。 用空气去除半导体芯片减少对半导体芯片的压力和损坏。

    PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING A PACKAGE SUBSTRATE
    15.
    发明申请
    PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING A PACKAGE SUBSTRATE 审中-公开
    封装基板，具有封装基板的半导体封装

    公开(公告)号：US20100013079A1

    公开(公告)日：2010-01-21

    申请号：US12504209

    申请日：2009-07-16

    申请人： In-Sik Cho ,  Yong-Kwan Lee ,  Cheol-Joon Yoo

    发明人： In-Sik Cho ,  Yong-Kwan Lee ,  Cheol-Joon Yoo

    IPC分类号： H01L23/28

    CPC分类号： H01L21/561 ,  H01L21/565 ,  H01L23/3121 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A package substrate may include an insulating substrate, a circuit pattern and a mold gate pattern. The insulating pattern may have a mold gate region through which a molding member may pass. The circuit pattern may be formed on the insulating substrate. The mold gate pattern may be formed on the mold gate region of the insulating substrate. The mold gate pattern may include a polymer having relatively strong adhesion strength with respect to the insulating substrate and relatively weak adhesion strength with respect to the molding member. Thus, costs of the package substrate and the semiconductor package may be decreased.

    摘要翻译： 封装基板可以包括绝缘基板，电路图案和模具浇口图案。 绝缘图案可以具有模制浇口区域，模制构件可以通过该模具浇口区域。 电路图案可以形成在绝缘基板上。 模具栅极图案可以形成在绝缘基板的模具栅极区域上。 模具浇口图案可以包括相对于绝缘基板具有相对较强的粘合强度的聚合物和相对于模制构件的相对弱的粘附强度。 因此，可以降低封装衬底和半导体封装的成本。

    Semiconductor device and method of packaging the same
    17.
    发明授权
    Semiconductor device and method of packaging the same 有权
    半导体装置及其封装方法

    公开(公告)号：US07279360B2

    公开(公告)日：2007-10-09

    申请号：US11536270

    申请日：2006-09-28

    申请人： Cheol-Joon Yoo

    发明人： Cheol-Joon Yoo

    IPC分类号： H01L21/44

    CPC分类号： H01L21/563 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

    摘要： Embodiments of the invention provide a semiconductor-chip mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device. According to some embodiments, when a semiconductor chip is mounted on the mounting body as a flip-chip type, an encapsulation process using an encapsulation resin is not required. In some embodiments, the mounting body includes a substrate formed of a polyimide film, a conductive pattern formed of copper, a protection layer pattern formed of PSR, and an adhesive pattern formed on the protection layer pattern. The adhesive pattern can be formed of an insulating material. A plurality of holes, into which a plurality of bumps formed on the semiconductor chip are inserted to be connected to the conductive pattern, are formed in the protection layer pattern and the adhesive pattern.

    摘要翻译： 本发明的实施例提供一种半导体芯片安装体，包括该安装体的半导体器件，以及一种封装半导体器件的方法。 根据一些实施例，当半导体芯片作为倒装型安装在安装体上时，不需要使用封装树脂的封装工艺。 在一些实施例中，安装体包括由聚酰亚胺膜形成的基板，由铜形成的导电图案，由PSR形成的保护层图案以及形成在保护层图案上的粘合图案。 粘合剂图案可以由绝缘材料形成。 在保护层图案和粘合剂图案中形成有在半导体芯片上形成的多个凸块插入以连接到导电图案的多个孔。