Abstract:
The invention provides a multi-state sense amplifier, coupled to at least one memory cell with changeable resistance and a plurality of reference cells. The first current mirror circuit, coupled to the output terminal of the memory cell, generates a second memory cell current at a first node according to a first memory cell current through the memory cell. The second current mirror circuit, coupled to the output terminal of the reference cells, generates a plurality of second reference currents at a plurality of second nodes according to a plurality of first reference currents through the reference cells. The load circuit, coupled to the first node, the second nodes, and a ground, provides equal loads for the second memory cell current and the second reference currents to respectively generate a memory cell voltage at the first node and a plurality of reference voltages at the second nodes.
Abstract:
The invention provides a multi-state sense amplifier, coupled to at least one memory cell with changeable resistance and a plurality of reference cells. The first current mirror circuit, coupled to the output terminal of the memory cell, generates a second memory cell current at a first node according to a first memory cell current through the memory cell. The second current mirror circuit, coupled to the output terminal of the reference cells, generates a plurality of second reference currents at a plurality of second nodes according to a plurality of first reference currents through the reference cells. The load circuit, coupled to the first node, the second nodes, and a ground, provides equal loads for the second memory cell current and the second reference currents to respectively generate a memory cell voltage at the first node and a plurality of reference voltages at the second nodes.
Abstract:
A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface. The first heater comprises a plurality of first switches connected in series to generate heat.
Abstract:
A light-emitting diode device includes: a substrate; a light-emitting layered structure formed on the substrate; a multi-functional layer having a first main portion and formed on the light-emitting layered structure for spreading current laterally and for reflecting light emitted from the light-emitting layered structure; and first and second electrodes electrically coupled to the light-emitting layered structure. The first electrode is formed on the light-emitting layered structure and has a first electrode main part. The first main portion of the multi-functional layer is aligned below and is provided with a size larger than that of the first electrode main part.
Abstract:
A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.
Abstract:
A polysilicon sensor is described which can be incorporated onto a silicon wafer containing integrated circuits for the purpose of detecting and monitoring electromigration(EM) in metal test stripes representative of the interconnection metallurgy used by the integrated circuits. The sensor capitalizes on the property of silicon whereby a small increase in temperature causes a large increase in carrier concentration. In this regard, the local temperature rise of an adjacent metal line undergoing EM failure manifests itself as a decrease in resistance of the sensor. The sensor is particularly suited for testing multi-level metallurgies such as those having an aluminum alloy sandwiched between metallic layers such as those used for diffusion barriers and anti-reflective coatings. Its fabrication is compatible with conventional MOSFET processes which use a self-aligned polysilicon gate. It can be particularly useful when built into the wafer kerf area or into a manufacturing test site(MTS) where it can be used to qualify the metallization of a particular job. Structures built into the wafer kerf can be tested immediately after metallization while those built into MTS chips can be reserved for long term reliability testing.
Abstract:
A polysilicon sensor is described which can be incorporated onto a silicon wafer containing integrated circuits for the purpose of detecting and monitoring electromigration(EM) in metal test stripes representative of the interconnection metallurgy used by the integrated circuits. The sensor capitalizes on the property of silicon whereby a small increase in temperature causes a large increase in carrier concentration. In this regard, the local temperature rise of an adjacent metal line undergoing EM failure manifests itself as a decrease in resistance of the sensor. The sensor is particularly suited for testing multi-level metallurgies such as those having an aluminum alloy sandwiched between metallic layers such as those used for diffusion barriers and anti-reflective coatings. Its fabrication is compatible with conventional MOSFET processes which use a self-aligned polysilicon gate. It can be particularly useful when built into the wafer kerf area or into a manufacturing test site(MTS) where it can be used to qualify the metallization of a particular job. Structures built into the wafer kerf can be tested immediately after metallization while those built into MTS chips can be reserved for long term reliability testing.
Abstract:
A multi-chip stack structure including a first chip, a second chip, a shielding layer, and a plurality of conductive bumps is provided. The second chip is stacked on the first chip. The second chip has a plurality of through silicon via (TSV) structures to conduct a reference voltage. The shielding layer and the plurality of conductive bumps are disposed between the first chip and the second chip, and are electrically connected to the plurality of TSV structures. The shielding layer can isolate noises and improve signal coupling between two adjacent chips.
Abstract:
The present invention provides a surface-modified electrode strip for measuring an electrochemical signal that is synergistically amplified by means of a nano-scaled gold particle layer and a lipid-soluble electron mediator layer. A biosensor comprising the electrode strip is also provided.
Abstract:
This invention is an intruder detection system which integrates wireless sensor network and security robots. Multiple ZigBee wireless sensor modules installed in the environment can detect intruders and abnormal conditions with various sensors, and transmit alert to the monitoring center and security robot via the wireless mesh network. The robot can navigate in the environment autonomously and approach to a target place using its localization system. If any possible intruder is detected, the robot can approach to that location, and transmit images to the mobile devices of the securities and users, in order to determine the exact situation in real time.