MODULAR LOW STRESS PACKAGE TECHNOLOGY
    11.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20110084371A1

    公开(公告)日:2011-04-14

    申请号:US12903734

    申请日:2010-10-13

    Abstract: A protective modular package cover has first and second fastening sections located at opposing first and second ends with one or more subassembly receiving sections disposed thereto and is configured to fasten the protective modular package cover to a core. Each fastening section has a foot surface located on a bottom surface of a fastening section and configured to make contact with the core, a mounting hole configured to receive a fastener, and a torque element. Each subassembly receiving section is configured to receive a subassembly and has a cross member formed along the underside of the protective modular package cover. Activation of the first torque element transfers a downward clamping force generated at the fastening element to a top surface of one or more subassemblies disposed in the one or more subassembly receiving sections via the cross member of each of the one or more subassembly receiving sections.

    Abstract translation: 保护性模块化封装盖具有位于相对的第一和第二端处的第一和第二紧固部分,其中设置有一个或多个子组件接收部分并且构造成将保护性模块化封装盖紧固到芯部。 每个紧固部分具有位于紧固部分的底表面上并且构造成与芯部接触的脚表面,构造成接收紧固件的安装孔和扭矩元件。 每个子组件接收部分构造成接收子组件并且具有沿着保护性模块化封装盖的下侧形成的横向构件。 第一扭矩元件的激活通过一个或多个子组件接收部分中的每一个的横向构件将在紧固元件处产生的向下夹持力传递到设置在一个或多个子组件接收部分中的一个或多个子组件的顶表面。

    Device for biasing an RF device operating in quasi-linear modes with
voltage compensation
    12.
    发明授权
    Device for biasing an RF device operating in quasi-linear modes with voltage compensation 失效
    用于使用电压补偿以准线性模式工作的RF器件偏置的装置

    公开(公告)号:US5457422A

    公开(公告)日:1995-10-10

    申请号:US268858

    申请日:1994-06-30

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    CPC classification number: H03F3/19 H03F1/302

    Abstract: A biasing device for actively biasing the base of an RF device operating in quasi-linear modes. The biasing device provides a source of low-impedance current and high current capability. The biasing device includes three transistors, each having a base, collector and emitter and one low turn-on diode. The first and second transistors are connected such that changes in the base-emitter voltage of the biased RF device can be detected. The third transistor is configured in a Darlington configuration with the first transistor in order to provide (1) increased sensitivity to voltage changes detected by the second transistor and (2) additional collector voltage for the second transistor to prevent it from operating in saturation. The low turn-on diode is a compensating diode which thermally tracks and compensates for operating changes in the second transistor due to temperature.

    Abstract translation: 用于主动偏置以准线性模式工作的RF装置的基座的偏置装置。 偏置装置提供低阻抗电流和高电流能力的源。 偏置器件包括三个晶体管,每个具有基极,集电极和发射极以及一个低导通二极管。 连接第一和第二晶体管,使得能够检测到偏置RF器件的基极 - 发射极电压的变化。 第三晶体管配置为具有第一晶体管的达林顿配置,以便提供(1)对由第二晶体管检测的电压变化的增加的灵敏度,以及(2)用于第二晶体管的另外的集电极电压以防止其在饱和中运行。 低导通二极管是补偿二极管,其由于温度而热跟踪和补偿第二晶体管中的工作变化。

    Modular low stress package technology
    13.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08853843B2

    公开(公告)日:2014-10-07

    申请号:US13406681

    申请日:2012-02-28

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    Abstract: A semiconductor subassembly, a modular sidewall element having modular dimensions that accommodates placement of the semiconductor subassembly in a modular layout and a semiconductor substrate base element coupled to the modular sidewall element. The semiconductor substrate base element has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element and the semiconductor substrate base element configured to form a base of the semiconductor subassembly.

    Abstract translation: 半导体子组件,具有模块化尺寸的模块化侧壁元件,其适应半导体子组件在模块化布局中的放置以及耦合到模块化侧壁元件的半导体衬底基座元件。 半导体衬底基底元件具有至少一个半导体元件,其尺寸被设计成由模块化侧壁元件和半导体衬底基底元件的模块化尺寸来容纳,该半导体元件配置成形成半导体子组件的基座。

    Modular low stress package technology
    14.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08639373B2

    公开(公告)日:2014-01-28

    申请号:US12903779

    申请日:2010-10-13

    Abstract: A method of designing a desired modular package assembly: determining the configuration and dimensions of the assembly from received user input design data, the assembly having a protective modular package cover with first and second fastening sections, subassembly receiving sections disposed between the fastening sections and having a cross member formed along the underside of the protective modular package cover and configured to receive a subassembly, and one or more subassemblies to be received by the subassembly receiving sections; determining an adhesive deposition strategy for deposition of an adhesive layer to the cross members of the subassembly receiving sections sufficient to affix the top side of the subassemblies to the cross members on the underside of the subassembly receiving sections; and incorporating the configuration and dimensions of the modular package assembly and the adhesive deposition strategy into a manufacturing assembly process configured to manufacture the modular package assembly.

    Abstract translation: 一种设计所需模块化封装组件的方法:从接收的用户输入设计数据确定组件的构造和尺寸,该组件具有带有第一和第二紧固部分的保护性模块化封装盖,设置在紧固部分之间的子组件接收部分, 沿着保护性模块化封装盖的下侧形成并构造成接收子组件的横向构件以及将被子组件接收部分接收的一个或多个子组件; 确定用于将粘合剂层沉积到子组件接收部分的横向构件的粘合剂沉积策略,足以将子组件的顶侧固定到子组件接收部分的下侧上的横向构件; 以及将模块化封装组件和粘合剂沉积策略的构造和尺寸结合到被配置为制造模块化封装组件的制造组装过程中。

    Modular low stress package technology
    15.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08283769B2

    公开(公告)日:2012-10-09

    申请号:US12903734

    申请日:2010-10-13

    Abstract: A protective modular package cover has first and second fastening sections located at opposing first and second ends with one or more subassembly receiving sections disposed thereto and is configured to fasten the protective modular package cover to a core. Each fastening section has a foot surface located on a bottom surface of a fastening section and configured to make contact with the core, a mounting hole configured to receive a fastener, and a torque element. Each subassembly receiving section is configured to receive a subassembly and has a cross member formed along the underside of the protective modular package cover. Activation of the first torque element transfers a downward clamping force generated at the fastening element to a top surface of one or more subassemblies disposed in the one or more subassembly receiving sections via the cross member of each of the one or more subassembly receiving sections.

    Abstract translation: 保护性模块化封装盖具有位于相对的第一和第二端处的第一和第二紧固部分,其中设置有一个或多个子组件接收部分并且构造成将保护性模块化封装盖紧固到芯部。 每个紧固部分具有位于紧固部分的底表面上并且构造成与芯部接触的脚表面,构造成接收紧固件的安装孔和扭矩元件。 每个子组件接收部分构造成接收子组件并且具有沿着保护性模块化封装盖的下侧形成的横向构件。 第一扭矩元件的激活通过一个或多个子组件接收部分中的每一个的横向构件将在紧固元件处产生的向下夹持力传递到设置在一个或多个子组件接收部分中的一个或多个子组件的顶表面。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    16.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20120164792A1

    公开(公告)日:2012-06-28

    申请号:US13406697

    申请日:2012-02-28

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    Abstract: A method of manufacturing a modular semiconductor subassembly: providing at least one semiconductor subassembly having a modular sidewall element of modular dimensions and a semiconductor substrate base element coupled to the modular sidewall element that has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element. If a modular package protective cover is to be used: providing the modular package protective cover configured to accommodate the semiconductor subassembly in accordance with a modular design; securing the semiconductor subassembly in the modular package protective cover to create a modular package assembly; and mounting the modular package assembly to a core, with a base side of the semiconductor substrate base element in contact with the core; otherwise: mounting the at semiconductor subassembly to the core, with the base side of the semiconductor substrate base element in contact with the core.

    Abstract translation: 一种制造模块化半导体子组件的方法:提供具有模块化尺寸的模块化侧壁元件的至少一个半导体子组件和耦合到所述模块化侧壁元件的半导体衬底基座元件,所述半导体衬底基座元件具有至少一个半导体元件,所述半导体元件的尺寸设计成由 模块化侧壁元件的模块化尺寸。 如果要使用模块化封装保护盖:提供模块化封装保护盖,其配置为根据模块化设计容纳半导体子组件; 将半导体子组件固定在模块化封装保护盖中以产生模块化封装组件; 以及将所述模块化封装组件安装到芯部,所述半导体衬底基底元件的基极侧与所述芯体接触; 否则:将半导体子组件安装到芯部,半导体衬底基底元件的基极侧与芯体接触。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    17.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 审中-公开
    模块式低应力包技术

    公开(公告)号:US20120158166A1

    公开(公告)日:2012-06-21

    申请号:US13406722

    申请日:2012-02-28

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    Abstract: A method of designing a desired modular assembly: determining a package outline of a modular package assembly; determining seating plane and overall package length characteristics; calculating minimum package height of the modular package assembly; designing the dimensions and the configuration of semiconductor subassemblies by receiving semiconductor subassembly user input design data at the design tool, each semiconductor subassembly of the one or more semiconductor subassemblies comprising a modular sidewall element and a semiconductor substrate base element coupled to the modular sidewall element, the semiconductor substrate base element having at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element and the semiconductor substrate base element configured to form a base of the semiconductor subassembly; and incorporating the configuration and dimensions of the modular package assembly and the one or more semiconductor subassemblies into a manufacturing assembly process.

    Abstract translation: 一种设计所需模块化组件的方法:确定模块化封装组件的封装外形; 确定座面和整体包装长度特征; 计算模块化包装组件的最小包装高度; 通过在设计工具处接收半导体子组件用户输入设计数据来设计半导体子组件的尺寸和配置,所述一个或多个半导体子组件的每个半导体子组件包括耦合到模块化侧壁元件的模块化侧壁元件和半导体衬底基座元件, 所述半导体衬底基底元件具有至少一个半导体元件,所述半导体元件的尺寸设计成由所述模块化侧壁元件和所述半导体衬底基底元件的模块化尺寸来容纳,所述半导体元件配置成形成所述半导体子组件的 并将模块化封装组件和一个或多个半导体子组件的结构和尺寸结合到制造组装过程中。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    18.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20110086469A1

    公开(公告)日:2011-04-14

    申请号:US12903761

    申请日:2010-10-13

    Abstract: A method of manufacturing a protected package assembly: providing a protective modular package cover in accordance with a modular design; selectively applying an adhesive to the cross member of each subassembly receiving section of the protective modular package cover that will receive a subassembly to form an adhesive layer of the protective modular package cover; encapsulating the one or more subassemblies in the subassembly receiving sections on the selectively applied adhesive layer to generate a protected package assembly; and controlling application of a distributed downward clamping force applied to the top surfaces of the subassemblies received by the protective modular package cover and useful for mounting the protected package assembly to a core through activation of fastener elements and cross members of the subassembly receiving sections.

    Abstract translation: 一种制造受保护的封装组件的方法:根据模块化设计提供保护性模块化封装盖; 选择性地将粘合剂施加到保护性模块化封装盖的每个子组件接收部分的横向构件上,所述组件接收部分将接纳子组件以形成保护性模块化封装盖的粘合剂层; 将所述一个或多个子组件封装在所述选择性施加的粘合剂层上的子组件接收部分中,以产生受保护的封装组件; 以及控制施加到由所述保护性模块化封装盖接收的所述子组件的顶表面上的分布式向下夹持力的应用,并且用于通过激活所述子组件接收部分的紧固件元件和横向构件将所述受保护的封装组件安装到芯体。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    19.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20110084376A1

    公开(公告)日:2011-04-14

    申请号:US12903752

    申请日:2010-10-13

    Abstract: A protective modular package assembly with one or more subassemblies, each having a base element, a sidewall element coupled to the base element, and a semiconductor device disposed within and coupled to the sidewall element and the base element; a protective modular package cover having fastening sections located at opposing ends of the cover, torque elements disposed on the opposing ends and configured to fasten the cover to a core, and subassembly receiving sections disposed between the fastening sections with each subassembly receiving section operable to receive a subassembly and having a cross member along the underside of the cover; and an adhesive layer configured to affix subassemblies to respective subassembly receiving sections. The torque elements are configured to transfer a downward clamping force generated at the fastening elements to a top surface of the subassemblies via the cross member of each of the one or more subassembly receiving sections.

    Abstract translation: 一种具有一个或多个子组件的保护性模块化封装组件,每个子组件具有基座元件,耦合到所述基座元件的侧壁元件,以及设置在所述侧壁元件和所述基座元件内并联接到所述侧壁元件的基底元件的半导体器件; 保护性模块化封装盖,其具有位于盖的相对端处的紧固部分,设置在相对端部上并被配置为将盖子紧固到芯部的扭矩元件以及设置在紧固部分之间的子组件接收部分,每个子组件接收部分可操作以接收 子组件,并且沿着盖的下侧具有横向构件; 以及被配置为将子组件固定到相应的子组件接收部分的粘合剂层。 扭矩元件构造成经由一个或多个子组件接收部分中的每一个的横向构件将在紧固元件处产生的向下夹持力传递到子组件的顶表面。

    Semiconductor indicator for voltage diagnostics in power amplifiers
    20.
    发明授权
    Semiconductor indicator for voltage diagnostics in power amplifiers 有权
    功率放大器电压诊断半导体指示器

    公开(公告)号:US07459979B2

    公开(公告)日:2008-12-02

    申请号:US11263116

    申请日:2005-10-31

    Abstract: A semiconductor indicator for quantitatively diagnosing voltage conditions in high power transistor devices is provided. The semiconductor indicator includes a first transistor and a second transistor, where an electrically active periphery of the second transistor is less than an electrically active periphery of the first transistor. The transistors are thermally coupled to one another and may be in close proximity. The second transistor detects the voltage of a node on the first transistor and may be monitored by infrared imaging. The breakdown voltage characteristic of the second transistor may not substantially change as the temperature in the first transistor increases. An optional control circuit monitors and detects the output voltage of the first transistor.

    Abstract translation: 提供了用于定量诊断大功率晶体管器件中的电压条件的半导体指示器。 半导体指示器包括第一晶体管和第二晶体管,其中第二晶体管的电活性周边小于第一晶体管的电活性周边。 晶体管彼此热耦合并且可以紧密接近。 第二晶体管检测第一晶体管上的节点的电压,并且可以通过红外成像来监测。 当第一晶体管的温度升高时,第二晶体管的击穿电压特性基本上不会改变。 可选的控制电路监视和检测第一晶体管的输出电压。

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