SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS
    11.
    发明申请
    SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS 审中-公开
    超导集成电路制造系统与方法

    公开(公告)号:US20150187840A1

    公开(公告)日:2015-07-02

    申请号:US14589574

    申请日:2015-01-05

    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.

    Abstract translation: 各种技术和设备允许制造超导电路和结构,例如约瑟夫逊结,其可以例如在量子计算机中有用。 例如,可以制造具有插入在能够超导的两个元件或层之间的电介质结构或层的低磁通量噪声三层结构。 超导通孔可以直接覆盖约瑟夫逊结。 诸如约瑟夫逊结的结构可以承载在平坦化的电介质层上。 可以使用翅片来除去结构中的热量。 能够超导的通孔可以具有小于约1微米的宽度。 该结构可以例如通过通孔和/或带连接器耦合到电阻器。

    SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS
    12.
    发明申请
    SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS 有权
    超导集成电路制造系统与方法

    公开(公告)号:US20150119252A1

    公开(公告)日:2015-04-30

    申请号:US14383837

    申请日:2013-03-07

    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.

    Abstract translation: 各种技术和装置允许制造超导电路。 可以形成铌/氧化铝/铌三层,并形成单个的约瑟夫逊结(JJ)。 保护盖可以在制造过程中保护JJ。 可以形成混合电介质。 可以使用减法图案化和/或添加剂图案化来形成超导集成电路。 可以通过电镀和/或通过化学机械平面化抛光来沉积超导金属层。 内层电介质的厚度可以通过沉积工艺来控制。 衬底可以包括硅的基底和包括氧化铝的顶层。 可以停止或暂停超导金属层的沉积,以在完成之前进行冷却。 可以通过在超导金属层中图案化对准标记物来对准多个层。

    Systems and methods for fabrication of superconducting integrated circuits
    16.
    发明授权
    Systems and methods for fabrication of superconducting integrated circuits 有权
    用于制造超导集成电路的系统和方法

    公开(公告)号:US09490296B2

    公开(公告)日:2016-11-08

    申请号:US14589574

    申请日:2015-01-05

    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.

    Abstract translation: 各种技术和设备允许制造超导电路和结构,例如约瑟夫逊结,其可以例如在量子计算机中有用。 例如,可以制造具有插入在能够超导的两个元件或层之间的电介质结构或层的低磁通量噪声三层结构。 超导通孔可以直接覆盖约瑟夫逊结。 诸如约瑟夫逊结的结构可以承载在平坦化的电介质层上。 可以使用翅片来除去结构中的热量。 能够超导的通孔可以具有小于约1微米的宽度。 该结构可以例如通过通孔和/或带连接器耦合到电阻器。

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