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    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES
    11.
    发明申请
    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES 有权

    公开(公告)号：US20210342289A1

    公开(公告)日：2021-11-04

    申请号：US17355458

    申请日：2021-06-23

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Alexander Maassen van den Brink ,  Peter Love ,  Mohammad H.S. Amin ,  Geordie Rose ,  David Grant ,  Miles F.H. Steininger ,  Paul I. Bunyk ,  Andrew J. Berkley

    IPC: G06F15/80 ,  H03K3/38 ,  H04L29/08 ,  G06N10/00 ,  G06F15/76

    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY
    12.
    发明申请
    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY 审中-公开

    公开(公告)号：US20170286859A1

    公开(公告)日：2017-10-05

    申请号：US15628963

    申请日：2017-06-21

    Applicant: D-Wave Systems Inc.

    Inventor： Richard G. Harris ,  Paul I. Bunyk ,  Mohammad H.S. Amin ,  Emile M. Hoskinson

    IPC: G06N99/00 ,  G06F15/82

    CPC classification number: G06N10/00 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY
    13.
    发明申请
    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY 有权
    量子处理器具有可靠的可编程连接性

    公开(公告)号：US20160335558A1

    公开(公告)日：2016-11-17

    申请号：US14691268

    申请日：2015-04-20

    Applicant: D-Wave Systems Inc.

    Inventor： Paul I. Bunyk ,  Mohammad H.S. Amin ,  Richard G. Harris ,  Trevor Michael Lanting ,  Mark W. Johnson ,  Jeremy P. Hilton ,  Emile M. Hoskinson

    IPC: G06N99/00 ,  G06F15/82

    CPC classification number: G06N99/002 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

    Abstract translation: 在量子处理器中，一些耦合器将给定的量子比特耦合到最近的相邻量子位（例如，在有序2D阵列中垂直和水平），其他耦合器耦合到下一个最近的相邻量子位（例如，在有序2D阵列中的对角线）。 耦合器可以包括半耦合器，以选择性地提供给定量子位与其他量子位之间的通信耦合，其可以是也可以不是最近的，或者甚至不是最近邻近的。 可调谐耦合器选择性地介入交流耦合。 控制系统可以在量子处理器上施加不同于“被设计”或“制造”的物理连接的连接。 拼版可以通过数字处理器处理工作或更新的工作图，映射或嵌入问题图。 可以从硬件和工作图的比较中创建一组排除量子位。 退火计划可以调整一个或多个量子位的相应的归一化电感，例如排除某些量子位。

    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES
    16.
    发明申请
    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES 审中-公开

    公开(公告)号：US20200293486A1

    公开(公告)日：2020-09-17

    申请号：US16859672

    申请日：2020-04-27

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Alexander Maassen van den Brink ,  Peter Love ,  Mohammad H.S. Amin ,  Geordie Rose ,  David Grant ,  Miles F.H. Steininger ,  Paul I. Bunyk ,  Andrew J. Berkley

    IPC: G06F15/80 ,  H03K3/38 ,  H04L29/08 ,  G06N10/00 ,  G06F15/76

    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

    Systems and methods employing new evolution schedules in an analog computer with applications to determining isomorphic graphs and post-processing solutions
    17.
    发明授权
    Systems and methods employing new evolution schedules in an analog computer with applications to determining isomorphic graphs and post-processing solutions 有权

    公开(公告)号：US10769545B2

    公开(公告)日：2020-09-08

    申请号：US14734924

    申请日：2015-06-09

    Applicant: D-Wave Systems Inc.

    Inventor： Mohammad H.S. Amin ,  Mark W. Johnson

    IPC: G06F17/00 ,  G06N5/00 ,  G06N10/00

    Abstract: A second problem Hamiltonian may replace a first problem Hamiltonian during evolution of an analog processor (e.g., quantum processor) during a first iteration in solving a first problem. This may be repeated during a second, or further successive iterations on the first problem, following re-initialization of the analog processor. An analog processor may evolve under a first non-monotonic evolution schedule during a first iteration, and second non-monotonic evolution schedule under second, or additional non-monotonic evolution schedule under even further iterations. A first graph and second graph may each be processed to extract final states versus a plurality of evolution schedules, and a determination made as to whether the first graph is isomorphic with respect to the second graph. An analog processor may evolve by decreasing a temperature of, and a set of quantum fluctuations, within the analog processor until the analog processor reaches a state preferred by a problem Hamiltonian.

    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES
    18.
    发明申请
    ANALOG PROCESSOR COMPRISING QUANTUM DEVICES 审中-公开

    公开(公告)号：US20190324941A1

    公开(公告)日：2019-10-24

    申请号：US16421211

    申请日：2019-05-23

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Alexander Maassen van den Brink ,  Peter Love ,  Mohammad H.S. Amin ,  Geordie Rose ,  David Grant ,  Miles F.H. Steininger ,  Paul I. Bunyk ,  Andrew J. Berkley

    IPC: G06F15/80 ,  G06N10/00 ,  G06F15/76 ,  H04L29/08 ,  H03K3/38

    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY
    19.
    发明申请
    QUANTUM PROCESSOR WITH INSTANCE PROGRAMMABLE QUBIT CONNECTIVITY 审中-公开

    公开(公告)号：US20190228331A1

    公开(公告)日：2019-07-25

    申请号：US16258082

    申请日：2019-01-25

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Richard G. Harris ,  Paul I. Bunyk ,  Mohammad H.S. Amin ,  Emile M. Hoskinson

    IPC: G06N10/00 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

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