公开(公告)号：US20180102361A1

公开(公告)日：2018-04-12

申请号：US15681822

申请日：2017-08-21

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Jun SAITO ,  Yasushi URAKAMI ,  Sachiko AOI

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/088 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/7813

Abstract: A switching device may be provided with: a semiconductor substrate; a trench provided in an upper surface of the semiconductor substrate; a gate insulating layer covering an inner surface of the trench; and a gate electrode located in the trench. The semiconductor substrate includes: a first semiconductor region being in contact with the gate insulating layer; a body region being in contact with the gate insulating layer under the first semiconductor region; a second semiconductor region being in contact with the gate insulating layer under the body region; a bottom region being in contact with the gate insulating layer at a bottom surface of the trench; and a connection region being in contact with the gate insulating layer at a lateral surface of the trench and connecting the body region and the bottom region. The connection region is thicker than the bottom region.

公开(公告)号：US20180019301A1

公开(公告)日：2018-01-18

申请号：US15602741

申请日：2017-05-23

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Yoshifumi YASUDA ,  Tatsuji NAGAOKA ,  Yasushi URAKAMI ,  Sachiko AOI

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/417 ,  H01L29/872 ,  H01L21/265 ,  H01L29/861 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/0619 ,  H01L21/0465 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0688 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/417 ,  H01L29/6606 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor device may include an element region and a peripheral voltage withstanding region. The peripheral voltage withstanding region includes inner circumferential guard rings; and outer circumferential guard rings having a width narrower than a width of the inner circumferential guard rings. An interval between the inner circumferential guard rings is narrower than an interval between the outer circumferential guard rings. Each of the inner circumferential guard rings includes a first high concentration region and a first low concentration region. Each of the outer circumferential guard rings includes a second high concentration region and a second low concentration region. A width of a part of each first low concentration region that is exposed on a front surface of the semiconductor device is wider than a width of a part of each second low concentration region that is exposed on the front surface.

公开(公告)号：US20220013666A1

公开(公告)日：2022-01-13

申请号：US17482840

申请日：2021-09-23

Applicant: DENSO CORPORATION

Inventor： Yasushi URAKAMI ,  Jun SAITO ,  Yusuke YAMASHITA

IPC: H01L29/78 ,  H01L29/10

Abstract: A semiconductor device includes a cell section having a plurality of gate structures, and an outer peripheral section surrounding the cell section. The cell section includes a semiconductor substrate, the plurality of gate structures, a first electrode and a second electrode. The cell section and the outer peripheral section includes a protective film made of a material having a thermal conductivity lower than that of the first electrode. The protective film extends from the outer peripheral section to an outer edge portion of the cell section adjacent to the outer peripheral section and covers a portion of the first electrode adjacent to the outer peripheral section.

公开(公告)号：US20200044018A1

公开(公告)日：2020-02-06

申请号：US16339223

申请日：2017-09-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Hiromichi KINPARA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/04 ,  H01L21/761

Abstract: A semiconductor device (10) includes a semiconductor substrate (12) including an element region (20) and an outer-periphery voltage withstanding region (22). The outer-periphery voltage withstanding region includes a plurality of p-type guard rings (40) surrounding the element region (20) in a multiple manner. Each of the guard rings (40) includes a high concentration region (42) and a low concentration region (44). A low concentration region of an outermost guard ring includes a first part (51x) positioned on an outer peripheral side of its high concentration region. Respective low concentration regions of the guard rings include respective second parts (52) each positioned in a range sandwiched between corresponding two adjacent high concentration regions among a plurality of concentration regions. A width of the first part on a front surface (12a) is wider than widths of the second parts on the front surface.

公开(公告)号：US20190341308A1

公开(公告)日：2019-11-07

申请号：US16511345

申请日：2019-07-15

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yasushi URAKAMI ,  Takehiro KATO ,  Sachiko AOI

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/78 ,  H01L29/16

Abstract: In a semiconductor device, a semiconductor element is formed in a semiconductor, an interlayer insulating film having a contact hole and containing at least one of phosphorus and boron is disposed above the semiconductor, a metal electrode is disposed above the interlayer insulating film and is connected to the semiconductor element through the contact hole, and the interlayer insulating film is filled with hydrogen.

公开(公告)号：US20190109187A1

公开(公告)日：2019-04-11

申请号：US16093882

申请日：2017-04-18

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tadashi MISUMI ,  Hiroomi EGUCHI ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423 ,  H01L21/265 ,  H01L21/28 ,  H01L29/66

Abstract: A switching element including: a bottom insulating layer disposed at a bottom of a trench; a side surface insulating film covering a side surface of the trench; and a gate electrode disposed inside the trench and insulated from a semiconductor substrate. The semiconductor substrate has a bottom region and a connection region. The bottom region is in contact with the bottom insulating layer. The connection region is in contact with the bottom insulating layer and the side surface insulating film, and connects a body region to the bottom region. An area of the connection region in which the bottom insulating layer contacts to the connection region includes an area with lower a second conductivity-type impurity concentration than a minimum value of the second conductivity-type impurity concentration in an area of the connection region in which the side surface insulating film contacts the connection region.

公开(公告)号：US20190058060A1

公开(公告)日：2019-02-21

申请号：US16075840

申请日：2016-12-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Jun SAITO ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/16 ,  H01L29/36 ,  H01L21/04 ,  H01L21/265 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/047 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397

Abstract: A trench gate semiconductor switching element is provided. The semiconductor substrate of the element includes a second conductivity type bottom region in contact with the gate insulation layer at a bottom surface of the trench, and a first conductivity type second semiconductor region extending from a position in contact with a lower surface of the body region to a position in contact with a lower surface of the bottom region. The bottom region includes a first bottom region in contact with the gate insulation layer in a first range of the bottom surface positioned at an end in a long direction of the trench and extending from the bottom surface to a first position; and a second bottom region in contact with the gate insulation layer in a second range adjacent to the first range and extending from the bottom surface to a second position lower than the first position.

公开(公告)号：US20180076289A1

公开(公告)日：2018-03-15

申请号：US15662829

申请日：2017-07-28

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Yuto KUROKAWA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/1095 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66583 ,  H01L29/66734 ,  H01L29/7813

Abstract: A switching device includes a semiconductor substrate; first and second trenches; gate insulating layers; and gate electrodes. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, first and second bottom semiconductor regions of the second conductivity type disposed in areas extending to bottom surfaces of the first and second trenches, and a connection semiconductor region of the second conductivity type extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the connection semiconductor region contacting the second semiconductor region, and being connected to the body region, and the first and second bottom semiconductor regions.