公开(公告)号：US20230420523A1

公开(公告)日：2023-12-28

申请号：US18462595

申请日：2023-09-07

Applicant: DENSO CORPORATION

Inventor： Yusuke HAYAMA ,  Yusuke YAMASHITA ,  Keita KATAOKA ,  Yukihiko WATANABE

IPC: H01L29/32 ,  H01L29/16 ,  H01L29/06 ,  H01L29/861 ,  H01L29/78

CPC classification number: H01L29/32 ,  H01L29/1608 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/063

Abstract: A semiconductor device includes a first main electrode, a second main electrode, and a semiconductor layer. The semiconductor layer includes a p-type semiconductor region disposed at a position exposed from the upper surface of the semiconductor layer and electrically connected to the second main electrode, and an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region. The n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region, and a hole trap is formed in the trap region.

公开(公告)号：US20190035882A1

公开(公告)日：2019-01-31

申请号：US16069914

申请日：2017-01-19

Applicant: DENSO CORPORATION

Inventor： Yuichi TAKEUCHI ,  Atsuya AKIBA ,  Katsumi SUZUKI ,  Yusuke YAMASHITA

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/04

Abstract: A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period.

公开(公告)号：US20170271457A1

公开(公告)日：2017-09-21

申请号：US15435833

申请日：2017-02-17

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Atsushi ONOGI ,  Toru ONISHI ,  Shuhei MITANI ,  Yusuke YAMASHITA ,  Katsuhiro KUTSUKI

IPC: H01L29/16 ,  H01L27/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L29/739

CPC classification number: H01L29/1608 ,  G01K7/01 ,  G01K7/015 ,  G01K7/028 ,  H01L23/34 ,  H01L27/0255 ,  H01L27/0716 ,  H01L27/2454 ,  H01L29/083 ,  H01L29/1095 ,  H01L29/6606 ,  H01L29/7397 ,  H01L29/7804 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/12036

Abstract: A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion in which an n-type drift region and a p-type body region are laminated. The temperature sensor portion is disposed in the semiconductor substrate and is separated from the drift region by the body region. The temperature sensor portion includes an n-type cathode region being in contact with the body region, and a p-type anode region separated from the body region by the cathode region.

公开(公告)号：US20220013666A1

公开(公告)日：2022-01-13

申请号：US17482840

申请日：2021-09-23

Applicant: DENSO CORPORATION

Inventor： Yasushi URAKAMI ,  Jun SAITO ,  Yusuke YAMASHITA

IPC: H01L29/78 ,  H01L29/10

Abstract: A semiconductor device includes a cell section having a plurality of gate structures, and an outer peripheral section surrounding the cell section. The cell section includes a semiconductor substrate, the plurality of gate structures, a first electrode and a second electrode. The cell section and the outer peripheral section includes a protective film made of a material having a thermal conductivity lower than that of the first electrode. The protective film extends from the outer peripheral section to an outer edge portion of the cell section adjacent to the outer peripheral section and covers a portion of the first electrode adjacent to the outer peripheral section.

公开(公告)号：US20210020788A1

公开(公告)日：2021-01-21

申请号：US16929712

申请日：2020-07-15

Applicant: DENSO CORPORATION

Inventor： Kouji EGUCHI ,  Teruaki KUMAZAWA ,  Yusuke YAMASHITA

IPC: H01L29/872

Abstract: A semiconductor device includes; a schottky diode; a semiconductor substrate that includes a first surface and a second surface opposite to the first surface; a schottky electrode that is placed on the first surface and schottky-contacts to the semiconductor substrate; a first electrode placed on the schottky electrode; and a second electrode that is placed on the second surface and is connected to the semiconductor substrate. The schottky electrode is made of a metal material that is a columnar crystal; and a content of carbon on the schottky electrode is less than 6×1019 cm−3 in at least a part of an area of the schottky electrode.

公开(公告)号：US20200220008A1

公开(公告)日：2020-07-09

申请号：US16819771

申请日：2020-03-16

Applicant: DENSO CORPORATION

Inventor： Yuichi TAKEUCHI ,  Yasuhiro EBIHARA ,  Masahiro SUGIMOTO ,  Yusuke YAMASHITA

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/66 ,  H01L29/10

Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.

公开(公告)号：US20200044018A1

公开(公告)日：2020-02-06

申请号：US16339223

申请日：2017-09-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Hiromichi KINPARA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/04 ,  H01L21/761

Abstract: A semiconductor device (10) includes a semiconductor substrate (12) including an element region (20) and an outer-periphery voltage withstanding region (22). The outer-periphery voltage withstanding region includes a plurality of p-type guard rings (40) surrounding the element region (20) in a multiple manner. Each of the guard rings (40) includes a high concentration region (42) and a low concentration region (44). A low concentration region of an outermost guard ring includes a first part (51x) positioned on an outer peripheral side of its high concentration region. Respective low concentration regions of the guard rings include respective second parts (52) each positioned in a range sandwiched between corresponding two adjacent high concentration regions among a plurality of concentration regions. A width of the first part on a front surface (12a) is wider than widths of the second parts on the front surface.

公开(公告)号：US20190386094A1

公开(公告)日：2019-12-19

申请号：US16304783

申请日：2017-06-29

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yuichi TAKEUCHI ,  Shuhei MITANI ,  Katsumi SUZUKI ,  Yusuke YAMASHITA

IPC: H01L29/06 ,  H01L29/872 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/16 ,  H01L29/66

Abstract: The width of the p type guard ring is set to match the interval between the adjacent p type guard rings, and the width of the p type guard ring is made larger as the interval between the p type guard rings becomes larger. The width of the frame portion is basically equal to the width of the p type deep layer so that the interval between the frame portions is equal to the interval between the p type deep layers. This makes it possible to reduce the difference in formation areas of the trenches per unit area in the cell portion, the connection portion and the guard ring portion. Therefore, when the p type layer is formed, the difference in the amount of the p type layer embedding into the trenches per unit area also decreases and the thickness of the p type layer is equalized.

公开(公告)号：US20190109187A1

公开(公告)日：2019-04-11

申请号：US16093882

申请日：2017-04-18

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tadashi MISUMI ,  Hiroomi EGUCHI ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423 ,  H01L21/265 ,  H01L21/28 ,  H01L29/66

Abstract: A switching element including: a bottom insulating layer disposed at a bottom of a trench; a side surface insulating film covering a side surface of the trench; and a gate electrode disposed inside the trench and insulated from a semiconductor substrate. The semiconductor substrate has a bottom region and a connection region. The bottom region is in contact with the bottom insulating layer. The connection region is in contact with the bottom insulating layer and the side surface insulating film, and connects a body region to the bottom region. An area of the connection region in which the bottom insulating layer contacts to the connection region includes an area with lower a second conductivity-type impurity concentration than a minimum value of the second conductivity-type impurity concentration in an area of the connection region in which the side surface insulating film contacts the connection region.

公开(公告)号：US20180076289A1

公开(公告)日：2018-03-15

申请号：US15662829

申请日：2017-07-28

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Yuto KUROKAWA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/1095 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66583 ,  H01L29/66734 ,  H01L29/7813

Abstract: A switching device includes a semiconductor substrate; first and second trenches; gate insulating layers; and gate electrodes. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, first and second bottom semiconductor regions of the second conductivity type disposed in areas extending to bottom surfaces of the first and second trenches, and a connection semiconductor region of the second conductivity type extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the connection semiconductor region contacting the second semiconductor region, and being connected to the body region, and the first and second bottom semiconductor regions.