公开(公告)号：US20200020814A1

公开(公告)日：2020-01-16

申请号：US16468059

申请日：2017-11-28

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Hiroki MIYAKE ,  Yasushi URAKAMI ,  Yusuke YAMASHITA

IPC: H01L29/872 ,  H01L29/423 ,  H01L29/06 ,  H01L29/66

Abstract: A semiconductor apparatus has a semiconductor substrate, a first trench provided in a front surface of the semiconductor substrate, an anode electrode provided inside the first trench, and a cathode electrode provided on a back surface of the semiconductor substrate. The semiconductor substrate has a first p-type region, a second p-type region, and a main n-type region which is in contact with the first p-type region and the second p-type region, and is in Schottky contact with the anode electrode in the side surface of the first trench. The semiconductor substrate satisfies the relationship that an area of the first trench, when the front surface is viewed in a plan view, is smaller than an area of a Schottky interface where the main n-type region is in contact with the anode electrode in the side surface of the first trench.

公开(公告)号：US20190043999A1

公开(公告)日：2019-02-07

申请号：US16073924

申请日：2017-01-31

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/872 ,  H01L29/24 ,  H01L29/06 ,  H01L29/40

Abstract: A diode includes: a semiconductor substrate including a first surface including a first range and a second range surrounding the first range, the first surface of the semiconductor substrate protruding in the first range from the second range such that the first surface having a step along a border between the first range and the second range; a first electrode that is in Schottky contact with the first electrode within the first range; an interlayer insulating film that covers the step, the second range, and an end portion of the first electrode; and a field plate electrode conductively connected to the first electrode. The field plate electrode covers a region of the interlayer insulating film covering the end portion of the first electrode and a region of the interlayer insulating film covering the step, and extends onto a region of the interlayer insulating film covering the second range.

公开(公告)号：US20190035944A1

公开(公告)日：2019-01-31

申请号：US16072417

申请日：2017-01-31

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/872 ,  H01L29/06

Abstract: A diode includes a semiconductor substrate; a top surface electrode in contact with a part of the top surface of the semiconductor substrate; and a bottom surface electrode in contact with at least a part of the bottom surface of the semiconductor substrate. The semiconductor substrate includes: an n-type high-concentration layer in ohmic contact with the bottom surface electrode; an n-type intermediate-concentration layer on a part of the n-type high-concentration layer; and an n-type low-concentration layer on a part of the n-type high-concentration layer. The n-type low-concentration layer surrounds the n-type intermediate-concentration layer. The top surface electrode is in Schottky contact with a top surface of the n-type intermediate-concentration layer, and a contact region where the top surface electrode and the semiconductor substrate are in contact extends onto then-type low-concentration layer beyond the n-type intermediate-concentration layer.

公开(公告)号：US20150308014A1

公开(公告)日：2015-10-29

申请号：US14650169

申请日：2014-02-07

Applicant: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO ,  DENSO CORPORATION ,  SHOWA DENKO K.K.

Inventor： Itaru GUNJISHIMA ,  Yusuke KANZAWA ,  Yasushi URAKAMI ,  Masakazu KOBAYASHI

IPC: C30B29/36 ,  C30B29/64 ,  H01L29/16 ,  C30B23/02

CPC classification number: C30B29/36 ,  C30B19/12 ,  C30B23/025 ,  C30B25/186 ,  C30B29/64 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/32

Abstract: A SiC single crystal includes, in a plane substantially parallel to a c-plane thereof, a region (A) in which edge dislocations having a Burgers vector (A) in a specific direction are unevenly distributed, and a region (B) in which basal plane dislocations having a Burgers vector (B) in a specific direction are unevenly distributed. The region (A) is located in a direction with respect to a facet portion, while the region (B) is located in a direction with respect to the facet portion. A SiC substrate is produced by cutting a SiC wafer from the SiC single crystal in a direction substantially parallel to the c-plane, and cutting the SiC substrate from the SiC wafer such that the SiC substrate mainly contains one of the region (A) and the region (B). A SiC device is fabricated using the SiC substrate.

Abstract translation: SiC单晶在基本上平行于其c面的平面中包括在特定方向上具有汉堡矢量（A）的边缘位错不均匀分布的区域（A）和区域（B），其中 在特定方向上具有汉堡矢量（B）的基面位错不均匀分布。 区域（A）相对于小面部位于<1-100>方向，而区域（B）相对于小面部分位于<11-20>方向。 通过在大致平行于c面的方向上从SiC单晶切割SiC晶片，从SiC晶片切割SiC衬底，使得SiC衬底主要包含区域（A）和 区域（B）。 使用SiC衬底制造SiC器件。

公开(公告)号：US20220231164A1

公开(公告)日：2022-07-21

申请号：US17715381

申请日：2022-04-07

Applicant: DENSO CORPORATION

Inventor： Jun SAITO ,  Keita KATAOKA ,  Yusuke YAMASHITA ,  Yukihiko WATANABE ,  Katsuhiro KUTSUKI ,  Yasushi URAKAMI

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10

Abstract: A switching element includes a semiconductor substrate having: an n-type drift region in contact with each of gate insulating films on a bottom surface and side surfaces of each of the trenches; a p-type body region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the n-type drift region; an n-type source region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the p-type body region, the n-type source region being separated away from the n-type drift region by the p-type body region; plurality of p-type bottom regions each of which is located under a corresponding one of the trenches and located away from a corresponding one of the gate insulating films; and a p-type connection region that connects the p-type bottom regions and the p-type body region.

公开(公告)号：US20200052112A1

公开(公告)日：2020-02-13

申请号：US16341340

申请日：2017-10-30

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Toru ONISHI ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/78 ,  H01L29/423

Abstract: In an end portion of a trench, an opening where the end portion of the trench is exposed is formed in a lead-out electrode, a side surface of the trench gate electrode on a top surface side of a semiconductor substrate is spaced from a trench side surface, and a range adjacent to a boundary line positioned between a top surface of the semiconductor substrate and the trench side surface is covered with a laminated insulating film configured such that an interlayer insulating film is laminated on a gate insulating film. This makes it possible to prevent dielectric breakdown of an insulating film.

公开(公告)号：US20200043823A1

公开(公告)日：2020-02-06

申请号：US16487007

申请日：2018-01-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L23/34 ,  H01L29/417 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/32 ,  H01L29/16

Abstract: A semiconductor device includes a semiconductor substrate comprising an upper surface and a lower surface, an upper electrode provided on the upper surface, and a lower electrode provided on the lower surface. The semiconductor substrate includes, in a planar view, a first section including a center of the semiconductor substrate and a second section located between the first section and a peripheral edge of the semiconductor substrate. The first and second sections each comprise a MOSFET structure including a body diode. The MOSFET structure in the first section and the MOSFET structure in the second section are different from each other such that a forward voltage drop of the body diode in the first section with respect to a current density is higher than a forward voltage drop of the body diode in the second section with respect to the current density.

公开(公告)号：US20240079492A1

公开(公告)日：2024-03-07

申请号：US18506290

申请日：2023-11-10

Applicant: DENSO CORPORATION

Inventor： Atsuya AKIBA ,  Yuichi TAKEUCHI ,  Kazuki ARAKAWA ,  Yusuke HAYAMA ,  Yasushi URAKAMI ,  Shinichiro MIYAHARA ,  Tomoo MORINO

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608

Abstract: A semiconductor device includes a second deep layer between a first deep layer and first current distribution layer and a base region in an active region and in a part of an inactive region adjacent to the active region. The second deep layer has a second stripe portion including lines connecting to the base region and the first deep layer. The semiconductor device further includes a second current distribution layer between the first current distribution layer and the base region and arranged between the lines of the second stripe portion. The first deep layer has a first stripe portion including a plurality of lines, and each line has an end portion connecting to a frame-shaped portion and an inner portion on an inner side of the end portion. The width of the end portion is equal to or greater than the inner portion.

公开(公告)号：US20190058061A1

公开(公告)日：2019-02-21

申请号：US16075870

申请日：2016-12-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Jun SAITO ,  Sachiko AOI ,  Yasushi URAKAMI

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L29/10 ,  H01L29/36 ,  H01L29/417 ,  H01L29/16 ,  H01L29/06 ,  H01L21/04 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/047 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397

Abstract: A trench gate semiconductor switching element is provided. The semiconductor substrate of this element includes a second conductivity type bottom region in contact with the gate insulation layer at a bottom surface of the trench; and a first conductivity type second semiconductor region extending from a position in contact with a lower surface of the body region to a position in contact with a lower surface of the bottom region, and in contact with the gate insulation layer on a lower side of the body region. The bottom region includes a low concentration region in contact with the gate insulation layer in a first range of the bottom surface positioned at an end in a long direction of the trench; and a high concentration region in contact with the gate insulation layer in a second range of the bottom surface adjacent to the first range.

公开(公告)号：US20180114789A1

公开(公告)日：2018-04-26

申请号：US15684057

申请日：2017-08-23

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Toru ONISHI ,  Katsuhiro KUTSUKI ,  Yasushi URAKAMI ,  Yukihiko WATANABE

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/088 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/7813

Abstract: A switching device may include a semiconductor substrate; gate trenches; bottom insulating layers covering bottom surfaces of the gate trenches; gate insulating layers covering side surfaces of the gate trenches; and gate electrodes arranged in the gate trenches. The gate insulating layers in a center portion may have a first thickness and a first dielectric constant, and one or more of the gate insulating layers in a peripheral portion may have, within at least a part of the peripheral portion, a second thickness thicker than the first thickness and a second dielectric constant greater than the first dielectric constant. The semiconductor substrate may include a first region being in contact with the gate insulating layers, a body region being in contact with the gate insulating layers under the first region, and a second region being in contact with the gate insulating layers under the body region.