Means and method for operating a resistive array
    14.
    发明授权
    Means and method for operating a resistive array 有权
    用于操作电阻阵列的方法和方法

    公开(公告)号:US08934293B1

    公开(公告)日:2015-01-13

    申请号:US13135235

    申请日:2011-06-29

    Abstract: The present invention is a means and method for constructing and operating a 3-D array and, more particularly, a 3-D memory array. This array can be manufactured as a monolithic integrated circuit at low cost by virtue of the limited number of steps per layer of memory elements. The low number of steps results by having the storage elements separated by a resistive component as opposed to an active component. The 3-D array is in essence, an array of 2-D resistive arrays (row-planes) having a long dimension (typically along the rows) and a short dimension (typically in the direction of the stacked layers). Any one row-plane can be isolated from the rest and be accessed independently from all of the other row-planes in the 3-D array. This makes it possible to operate and analyze a single row-plane as a mostly stand-alone circuit. The present invention lends itself to single bit accesses as well as simultaneous multiple bit accesses.

    Abstract translation: 本发明是用于构建和操作3-D阵列,更具体地,3-D存储器阵列的方法和方法。 凭借每层存储器元件的有限数量的步骤,该阵列可以以低成本制造为单片集成电路。 通过使存储元件被电阻性元件分离而不是有源元件而导致低步数。 3-D阵列本质上是具有长尺寸(通常沿着行)和短尺寸(通常在堆叠层的方向)上的2-D电阻阵列(行平面)的阵列。 任何一个行平面可以与其余行隔离,并独立于3-D数组中的所有其他行平面进行访问。 这使得可以将单行平面作为主要独立电路进行操作和分析。 本发明适用于单位访问以及同时多位访问。

    Diode polarity for diode array
    16.
    发明申请
    Diode polarity for diode array 审中-公开
    二极管阵列的二极管极性

    公开(公告)号:US20110309414A1

    公开(公告)日:2011-12-22

    申请号:US12930655

    申请日:2011-01-13

    CPC classification number: H01L27/1021

    Abstract: A memory-array is disclosed in which an array of non-linear conductors such as diodes is constructed having an area per memory cell of 4F2 and comprises a plurality of conductors fabricated as doped semiconductor conducting lines in the substrate such that, during normal operation, an unselected conductor has a zero bias to the substrate and a selected conductor has a reverse bias to the substrate for minimizing current leakage

    Abstract translation: 公开了一种存储器阵列,其中构造了诸如二极管的非线性导体阵列,其具有每个存储器单元4F2的面积,并且包括在衬底中制造为掺杂半导体导线的多个导体,使得在正常操作期间, 未选择的导体对衬底具有零偏置,并且所选择的导体对衬底具有反向偏置以最小化电流泄漏

    Electric device cord handler
    20.
    发明授权
    Electric device cord handler 有权
    电器线路处理机

    公开(公告)号:US08342458B2

    公开(公告)日:2013-01-01

    申请号:US12804126

    申请日:2010-07-14

    CPC classification number: A01D34/822

    Abstract: The present invention relates to corded electric devices and more particularly to corded electric devices that move their location such as an electric lawn mower. The present invention is a device for handling the electric cord of a device such as an electric lawn mower or some other movable platform to which electric power is provided (a lawn mower is a movable platform having a device for cutting grass such as spinning blades). The present invention manages the position of a cord as the platform on which it is mounted is moved.

    Abstract translation: 本发明涉及有线电气设备,更具体地说涉及移动其位置的有线电气设备,例如电动割草机。 本发明是一种用于处理诸如电动割草机或其他可移动平台的装置的电线的装置,其中设置有电力(割草机是具有用于切割草的装置如旋转叶片的可移动平台) 。 本发明管理当其安装的平台移动时的线的位置。

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