公开(公告)号：US07685450B2

公开(公告)日：2010-03-23

申请号：US11674450

申请日：2007-02-13

申请人： Drew J. Dutton ,  James R. MacDonald ,  Stephen Cox

发明人： Drew J. Dutton ,  James R. MacDonald ,  Stephen Cox

IPC分类号： G06F1/00

CPC分类号： G06F1/3215

摘要： A system and method for monitoring usage of peripheral devices and placing a second peripheral device in a low power state when the usage indicates that a second peripheral device is not being used. For example, if a computer system detects that a user's current typing rate indicates the user probably has both hands on a keyboard, the computer system may generate a signal to the computer mouse to enter a low power state. The computer system may use prior usage for a user to determine when current usage indicates that the second peripheral device is not being used. After the second peripheral device is placed in a low power state, the computer system may generate a signal to the second peripheral device to return to a normal power state when the computer system determines that the user no longer has both hands occupied.

摘要翻译： 一种用于监视外围设备的使用并且当使用指示没有使用第二外围设备时将第二外围设备置于低功率状态的系统和方法。 例如，如果计算机系统检测到用户的当前打字率指示用户可能在键盘上具有双手，则计算机系统可以向计算机鼠标生成信号以进入低功率状态。 计算机系统可以使用用户的先前使用来确定当前使用情况何时指示第二外围设备未被使用。 在第二外围设备处于低功率状态之后，当计算机系统确定用户不再具有双手时，计算机系统可以向第二外围设备产生信号以返回到正常的功率状态。

公开(公告)号：US20100039121A1

公开(公告)日：2010-02-18

申请号：US12359056

申请日：2009-01-23

申请人： Simeon K. Iliev ,  Drew J. Dutton

发明人： Simeon K. Iliev ,  Drew J. Dutton

IPC分类号： G01R27/26 ,  G06F15/00

CPC分类号： G06K9/0002

摘要： Low cost fingerprint system having a single chip solution includes a circuit board, a fingerprint sensor array fabricated onto a first surface of the circuit board, and an integrated circuit die for processing information received from the fingerprint sensor array is mounted directly to a second surface of the circuit board. The integrated circuit die may be electrically connected to the sensor by, for example, vias in the circuit board.

摘要翻译： 具有单芯片解决方案的低成本指纹系统包括电路板，制造在电路板的第一表面上的指纹传感器阵列和用于处理从指纹传感器阵列接收的信息的集成电路管芯直接安装在第二表面 电路板。 集成电路管芯可以通过例如电路板中的通孔电连接到传感器。

公开(公告)号：US06825786B1

公开(公告)日：2004-11-30

申请号：US10430863

申请日：2003-05-06

申请人： James R. MacDonald ,  Drew J. Dutton ,  Stephen Cox

发明人： James R. MacDonald ,  Drew J. Dutton ,  Stephen Cox

IPC分类号： H03M166

CPC分类号： G10K11/178 ,  G10K2210/11 ,  G10K2210/3033 ,  G11B20/10009

摘要： A system may include a memory configured to store an attenuation waveform and control logic. The control logic is configured to receive a synchronizing signal indicative of an operating characteristic of a noise source. In response to a value of a characteristic (e.g., frequency) of the synchronizing signal, the control logic is configured to output the attenuation waveform from the memory if the attenuation waveform is associated with that value of the characteristic of the synchronizing signal. An attenuating noise generated dependent on the attenuation waveform attenuates a noise generated by the noise source.

摘要翻译： 系统可以包括被配置为存储衰减波形和控制逻辑的存储器。 控制逻辑被配置为接收指示噪声源的操作特性的同步信号。 响应于同步信号的特性（例如，频率）的值，如果衰减波形与同步信号的特性值相关联，则控制逻辑被配置为从存储器输出衰减波形。 根据衰减波形产生的衰减噪声会衰减由噪声源产生的噪声。

公开(公告)号：US06219754B1

公开(公告)日：2001-04-17

申请号：US08994489

申请日：1997-12-19

申请人： Steven L. Belt ,  Douglas D. Gephardt ,  Drew J. Dutton ,  Brett B. Stewart ,  Rita M. Wisor

发明人： Steven L. Belt ,  Douglas D. Gephardt ,  Drew J. Dutton ,  Brett B. Stewart ,  Rita M. Wisor

IPC分类号： G06F1200

CPC分类号： G06F12/0875

摘要： A dedicated bus between a central processing unit and a peripheral unit, such as a graphics controller driving a video display, provides enhanced capability in an environment in which signal processing occurs within the central processing unit. The dedicated bus relieves other data buses, such as the PCI bus, of the need to communicate large amounts of data, such as decompressed video data. The resulting system supports high bandwidth transmissions of decompressed video data, enabling high resolution 24 bit full motion video and multiple data stream video.

摘要翻译： 在中央处理单元和周边单元之间的专用总线，例如驱动视频显示器的图形控制器，在中央处理单元内发生信号处理的环境中提供增强的能力。 专用总线减轻了诸如PCI总线的其他数据总线，需要传送大量数据，例如解压缩的视频数据。 所得到的系统支持解压缩视频数据的高带宽传输，实现高分辨率24位全动态视频和多数据流视频。

公开(公告)号：US5625829A

公开(公告)日：1997-04-29

申请号：US276250

申请日：1994-07-18

申请人： Douglas D. Gephardt ,  Steven L. Belt ,  Drew J. Dutton

发明人： Douglas D. Gephardt ,  Steven L. Belt ,  Drew J. Dutton

IPC分类号： G06F15/173 ,  G06F1/16 ,  G06F13/36 ,  G06F13/364 ,  G06F13/40 ,  G06F3/00

CPC分类号： G06F13/364 ,  G06F1/1632 ,  G06F13/4036 ,  G06F13/4081

摘要： A dockable computer system is capable of performing symmetrical multi-processing operations. More particularly, the dockable computer system includes a portable computer and a host station (docking station), each including a resident CPU. The dockable computer system is capable of operating in a docked state in which the portable computer is physically joined with the host station and an undocked state in which the portable computer is physically separate from the host station. In the docked state, the dockable computer system is capable of performing demanding computational tasks such as video conferencing as one of the CPUs in either the portable computer or host station is dedicated to the video conferencing operation. The dockable computer system preferably includes a communication channel for transmitting multi-processing support signals between the portable computer and the host station. Multi-processing support signals include synchronization signals, cache coherency signals, and interrupt distribution signals such as the LOCK signal, PLOCK signal, FLUSH signal, EADS signal, INTR signal or INTACK signal. The communication channel may be a dedicated bus or may be provided through a docking bridge between the portable computer and host station. The dockable computer system advantageously optimizes CPU resources when the dockable computer system is in a docked state.

摘要翻译： 可停靠的计算机系统能够执行对称的多处理操作。 更具体地，可停靠的计算机系统包括便携式计算机和主机站（对接站），每个都包括驻留的CPU。 可停靠的计算机系统能够在对接状态下操作，其中便携式计算机与主机站物理连接，并且其中便携式计算机在物理上与主机站分离的未停靠状态。 在对接状态下，可停靠的计算机系统能够执行诸如视频会议的苛刻的计算任务，因为便携式计算机或主机站中的一个CPU专用于视频会议操作。 对接计算机系统优选地包括用于在便携式计算机和主机站之间传送多处理支持信号的通信信道。 多处理支持信号包括同步信号，高速缓存一致性信号和中断分配信号，例如LOCK信号，PLOCK信号，FLUSH信号，EADS信号，INTR信号或INTACK信号。 通信信道可以是专用总线，或者可以通过便携式计算机和主机站之间的对接桥提供。 可对接计算机系统有利地优化当可停靠的计算机系统处于对接状态时的CPU资源。

公开(公告)号：US5142672A

公开(公告)日：1992-08-25

申请号：US132296

申请日：1987-12-15

申请人： William M. Johnson ,  Timothy A. Olson ,  Drew J. Dutton ,  Sherman Lee ,  David W. Stoenner

发明人： William M. Johnson ,  Timothy A. Olson ,  Drew J. Dutton ,  Sherman Lee ,  David W. Stoenner

IPC分类号： G06F13/28 ,  G06F13/36

CPC分类号： G06F13/28

摘要： Methods and apparatus are disclosed for transferring data to and from a first bus, to which a first set of high performance devices, including at least one central processing unit ("CPU") is attached, and a second bus, to which a second set of relatively lower performance devices is attached. More particularly the invention accomplishes the above transfer function in a manner that facilitates communication between the first and second set of devices from the compartively lower performance of the second set of devices. According to the preferred embodiment of the invention, a data transfer controller i.e., ("DTC") is disclosed that includes a set of direct memory access ("DMA") channels and an input/output controller comprising a set of address mapped I/O ports. Both the DMA channels and I/O ports may be used to transfer data between the high performance channel (hereinafter referred to as the "Local Bus") coupled to the CPU in a reduced instruction set computer (RISC) system and a typically lower performance, peripheral bus (hereinafter referred to as a "Remote Bus"). The resulting DTC interface between the Local Bus and a Remote Bus permits a wide performance range of standard peripheral devices to be attached to the RISC system in a manner that does not limit system performance.

公开(公告)号：US08572420B2

公开(公告)日：2013-10-29

申请号：US11071961

申请日：2005-03-04

申请人： Drew J. Dutton ,  James R. MacDonald ,  Henry Wurzburg

发明人： Drew J. Dutton ,  James R. MacDonald ,  Henry Wurzburg

IPC分类号： G06F3/00

CPC分类号： G06K19/07732 ,  G06K7/0013 ,  G06K7/0086 ,  G06K19/0701

摘要： In various embodiments, a computer system may include a computer controller to send and/or receive sideband signals to/from a USB device. In some embodiments, the USB device may include a USB controller to send/receive sideband signals to/from the computer controller. The computer controller and USB controller may allow communications between the computer system and the USB device when either of the computer system or USB device is in a low power state. The sideband signal sent between the computer system and the USB device may trigger the other of the computer system or USB device to enter a normal power state. In some embodiments, the computer controller and/or USB controller may be further coupled to a memory to buffer data to be sent to the computer system or USB device after the computer system or USB device returns to a normal power state.

摘要翻译： 在各种实施例中，计算机系统可以包括计算机控制器来向/从USB设备发送和/或接收边带信号。 在一些实施例中，USB设备可以包括用于向计算机控制器发送/接收边带信号的USB控制器。 当计算机系统或USB设备中的任一个处于低功率状态时，计算机控制器和USB控制器可以允许计算机系统和USB设备之间的通信。 在计算机系统和USB设备之间发送的边带信号可能触发计算机系统或USB设备中的另一个进入正常的电源状态。 在一些实施例中，计算机控制器和/或USB控制器可以进一步耦合到存储器，以在计算机系统或USB设备恢复到正常功率状态之后缓冲要发送到计算机系统或USB设备的数据。

公开(公告)号：US07930576B2

公开(公告)日：2011-04-19

申请号：US11958601

申请日：2007-12-18

申请人： Ian F. Harris ,  Drew J. Dutton

发明人： Ian F. Harris ,  Drew J. Dutton

IPC分类号： G06F1/26 ,  G06F15/177

CPC分类号： G06F13/16

摘要： System and method for sharing a device, e.g., non-volatile memory, between a host processor and a microcontroller. In response to system state change to a first state wherein the microcontroller is assured safe access to the non-volatile memory (e.g., in response to power-on reset, system reset, sleep state, etc.), the microcontroller holds the system in the first state (e.g., system reset), and switches access to the non-volatile memory from the processor to the microcontroller. While the system is held in the first state, the microcontroller accesses the device (e.g., non-volatile memory), e.g., fetches program instructions/data from the non-volatile memory and loads the program instructions/data into a memory of the microcontroller. After the access, the microcontroller changes or allows change of the system state, e.g., switches access to the device, e.g., the non-volatile memory, from the microcontroller to the processor, and releases the system from the first state.

摘要翻译： 用于在主处理器和微控制器之间共享设备（例如，非易失性存储器）的系统和方法。 响应于系统状态改变到第一状态，其中微控制器被安全地访问非易失性存储器（例如，响应于上电复位，系统复位，睡眠状态等），微控制器将系统保持在 第一个状态（例如，系统复位），并切换从处理器到微控制器的非易失性存储器的访问。 当系统处于第一状态时，微控制器访问设备（例如，非易失性存储器），例如从非易失性存储器获取程序指令/数据，并将程序指令/数据加载到微控制器的存储器中 。 在访问之后，微控制器改变或允许系统状态的改变，例如，将从该微控制器的设备（例如，非易失性存储器）的访问切换到处理器，并将系统从第一状态释放。

公开(公告)号：US20090058429A1

公开(公告)日：2009-03-05

申请号：US11870529

申请日：2007-10-11

申请人： Ian F. Harris ,  Drew J. Dutton ,  Kenneth W. Gay

发明人： Ian F. Harris ,  Drew J. Dutton ,  Kenneth W. Gay

IPC分类号： G01R27/26

CPC分类号： G06F1/1679 ,  G06F1/1616 ,  H03K17/975 ,  H04M1/0245 ,  H04M2250/12 ,  H04W52/0251 ,  Y02D70/168

摘要： System and method for determining closure of an electronic device. The electronic device may include a top portion and a bottom portion, and may be connecting via a hinge or other closing mechanism. The top portion and/or the bottom portion may include one or more capacitive sensors which provide signals corresponding to physical contact and a controller coupled to the one or more capacitive sensors. The controller may operate to receive the signals from the one or more capacitive sensors, determine if the electronic device has been closed based on the received signals, and initiate a sequence of events corresponding to the closure of the electronic device. The sequence of events may result in the device entering a low power state.

摘要翻译： 用于确定电子设备闭合的系统和方法。 电子设备可以包括顶部和底部，并且可以经由铰链或其他关闭机构连接​​。 顶部和/或底部可以包括提供对应于物理接触的信号的一个或多个电容式传感器，以及耦合到一个或多个电容式传感器的控制器。 控制器可以操作以接收来自一个或多个电容式传感器的信号，基于接收到的信号确定电子设备是否已经被关闭，并且启动与电子设备的关闭对应的事件序列。 事件的顺序可能导致设备进入低功率状态。

公开(公告)号：US06883105B2

公开(公告)日：2005-04-19

申请号：US10004390

申请日：2001-10-25

申请人： Drew J. Dutton

发明人： Drew J. Dutton

IPC分类号： G06F1/32 ,  G06F1/26

CPC分类号： G06F1/3215

摘要： A method and apparatus for configuration control and power management through special signaling is provided. In one embodiment, a computer system may include a processor and a plurality of devices that may act as a source device, a destination device, or both. A particular source device may be configured for communications with a destination device. The source device may further be configured to violate one or more known communications rules when communicating the with the destination device. The destination device may be configured to detect the violation. The violation of a known communications rule by the source device may indicate a pending change of state in the computer system, or that a change of state has occurred.

摘要翻译： 提供了一种通过特殊信令进行配置控制和电源管理的方法和装置。 在一个实施例中，计算机系统可以包括可以充当源设备，目的地设备或两者的处理器和多个设备。 可以将特定源设备配置为与目的地设备进行通信。 源设备还可以被配置为在与目的地设备通信时违反一个或多个已知通信规则。 目的地设备可以被配置为检测违规。 由源设备违反已知的通信规则可以指示计算机系统中的待决状态改变，或者已经发生状态改变。