公开(公告)号：US20130082229A1

公开(公告)日：2013-04-04

申请号：US13414727

申请日：2012-03-08

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L47/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/1206 ,  H01L45/122 ,  H01L45/126 ,  H01L45/1286 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148

Abstract: A mixed ionic-electronic conduction (MIEC) memory cell including a mixed ionic-electronic conductor containing dopants therein, a heater disposed adjacent to the mixed ionic-electronic conductor, a pair of first electrodes electrically connected to the mixed ionic-electronic conductor, and at least one pair of second electrodes electrically connected to the mixed ionic-electronic conductor is provided. The pair of first electrodes drive the dopants in the mixed ionic-electronic conductor to drift along a first direction when the mixed ionic-electronic conductor is heated by the heater. The pair of second electrodes locally modify a distribution of the dopants along a second direction when the mixed ionic-electronic conductor is heated by the heater, and the first direction is different from the second direction.

Abstract translation: 一种混合离子电子传导（MIEC）存储单元，包括其中含有掺杂剂的混合离子电子导体，邻近混合离子电子导体设置的加热器，电连接到混合离子电子导体的一对第一电极，以及 提供与混合的离子电子导体电连接的至少一对第二电极。 当混合的离子电子导体被加热器加热时，该对第一电极驱动混合离子电子导体中的掺杂剂沿着第一方向漂移。 当混合的离子电子导体被加热器加热时，一对第二电极局部地修改掺杂剂沿着第二方向的分布，并且第一方向不同于第二方向。

公开(公告)号：US20100108980A1

公开(公告)日：2010-05-06

申请号：US12264225

申请日：2008-11-03

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00

CPC classification number: H01L27/24

Abstract: The invention is directed to a resistive memory cell on a substrate. The resistive memory cell comprises a first gate, a second gate, a common doped region, a contact plug, a bit line and a resistive memory element. The first gate and the second gate are separately disposed on the substrate. Notably, the first length of the first gate is different from the second length of the second gate. Furthermore, the common doped region of the first gate and the second gate is disposed in the substrate. The contact plug is electrically connected to the common doped region and the bit line is disposed over the substrate. Moreover, the resistive memory element is connected between the contact plug and the bit line.

Abstract translation: 本发明涉及一种在衬底上的电阻式存储单元。 电阻存储单元包括第一栅极，第二栅极，公共掺杂区域，接触插塞，位线和电阻存储元件。 第一栅极和第二栅极分别设置在基板上。 值得注意的是，第一栅极的第一长度不同于第二栅极的第二长度。 此外，第一栅极和第二栅极的公共掺杂区域设置在衬底中。 接触插塞电连接到公共掺杂区域，位线设置在衬底上。 此外，电阻式存储元件连接在接触插塞和位线之间。

公开(公告)号：US20090189142A1

公开(公告)日：2009-07-30

申请号：US12324871

申请日：2008-11-27

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683

Abstract: A phase-change memory element with side-wall contacts is disclosed, which has a bottom electrode. A non-metallic layer is formed on the electrode, exposing the periphery of the top surface of the electrode. A first electrical contact is on the non-metallic layer to connect the electrode. A dielectric layer is on and covering the first electrical contact. A second electrical contact is on the dielectric layer. An opening is to pass through the second electrical contact, the dielectric layer, and the first electrical contact and preferably separated from the electrode by the non-metallic layer. A phase-change material is to occupy one portion of the opening, wherein the first and second electrical contacts interface the phase-change material at the side-walls of the phase-change material. A second non-metallic layer may be formed on the second electrical contact. A top electrode contacts the top surface of the outstanding terminal of the second electrical contact.

Abstract translation: 公开了具有侧壁触点的相变存储元件，其具有底部电极。 在电极上形成非金属层，暴露电极顶表面的周边。 第一电接触在非金属层上以连接电极。 电介质层在第一电触头上并覆盖着。 第二电接触在介电层上。 开口通过第二电触点，电介质层和第一电触点，并且优选地通过非金属层与电极分离。 相变材料占据开口的一部分，其中第一和第二电触点在相变材料的侧壁处与相变材料接触。 可以在第二电接触件上形成第二非金属层。 顶部电极接触第二电触点的未完成端子的顶表面。

公开(公告)号：US20090189140A1

公开(公告)日：2009-07-30

申请号：US12020489

申请日：2008-01-25

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00

CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683

Abstract: A phase-change memory element with side-wall contacts is disclosed. The phase-change memory element comprises a bottom electrode. A first dielectric layer is formed on the bottom electrode. A first electrical contact is formed on the first dielectric layer and electrically connects to the bottom electrode. A second dielectric layer is formed on the first electrical contact. A second electrical contact is formed on the second dielectric layer, wherein the second electrical contact comprises an outstanding terminal. An opening passes through the second electrical contact, the second dielectric layer, and the first electrical contact. A phase-change material occupies at least one portion of the opening. A third dielectric layer is formed on and covers the second electrical contact, exposing a top surface of outstanding terminal. A top electrode is formed on the third dielectric layer, contacting the outstanding terminal.

Abstract translation: 公开了一种具有侧壁触点的相变存储元件。 相变存储元件包括底电极。 第一电介质层形成在底电极上。 第一电接触形成在第一电介质层上并电连接到底电极。 在第一电触点上形成第二电介质层。 第二电接触形成在第二电介质层上，其中第二电接触包括未完成的端子。 开口穿过第二电触点，第二电介质层和第一电触头。 相变材料占据开口的至少一部分。 第三电介质层形成在并覆盖第二电触点，露出未完成端子的顶表面。 顶部电极形成在第三电介质层上，与未完成的端子接触。

公开(公告)号：US20090127535A1

公开(公告)日：2009-05-21

申请号：US12205635

申请日：2008-09-05

Applicant: Wei-Su Chen ,  Chih-Wei Chen ,  Frederick T. Chen

Inventor： Wei-Su Chen ,  Chih-Wei Chen ,  Frederick T. Chen

IPC: H01L47/00 ,  H01L21/00

CPC classification number: H01L45/1273 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/124 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1641 ,  H01L45/1691

Abstract: A phase change memory device is disclosed, including a substrate. The phase change memory also includes a bottom electrode. A conductive structure with a cavity is provided to electrically contact the bottom electrode, wherein the conductive structure includes sidewalls with different thicknesses. A phase change spacer is formed to cross the sidewalls with different thicknesses. A top electrode is electrically contacted to the phase change spacer.

Abstract translation: 公开了一种相变存储器件，包括衬底。 相变存储器还包括底部电极。 提供具有空腔的导电结构以电接触底部电极，其中导电结构包括具有不同厚度的侧壁。 形成相变间隔物以跨越具有不同厚度的侧壁。 顶部电极与相变间隔物电接触。

公开(公告)号：US20090014705A1

公开(公告)日：2009-01-15

申请号：US12127712

申请日：2008-05-27

Applicant: Hong-Hui Hsu ,  Frederick T. Chen ,  Ming-Jer Kao

Inventor： Hong-Hui Hsu ,  Frederick T. Chen ,  Ming-Jer Kao

IPC: H01L29/04 ,  H01L21/77

CPC classification number: H01L45/06 ,  G11C13/0004 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1675

Abstract: A phase change memory device is provided. The phase change memory device comprises a substrate. A first conductive layer is formed on the substrate. A heating electrode is formed on the first conductive layer, and electrically connected to the first conductive layer, wherein the heating electrode comprises a carbon nanotube (CNT). A phase change material layer covers the heating electrode. A second conductive layer is formed on the phase change material layer, and electrically connected to the phase change material layer.

Abstract translation: 提供了相变存储器件。 相变存储器件包括衬底。 在基板上形成第一导电层。 在第一导电层上形成加热电极，与第一导电层电连接，其中加热电极包括碳纳米管（CNT）。 相变材料层覆盖加热电极。 第二导电层形成在相变材料层上，并且电连接到相变材料层。

公开(公告)号：US08817521B2

公开(公告)日：2014-08-26

申请号：US13488937

申请日：2012-06-05

Applicant: Yu-Sheng Chen ,  Heng-Yuan Lee ,  Yen-Ya Hsu ,  Pang-Shiu Chen ,  Ching-Chih Hsu ,  Frederick T. Chen

Inventor： Yu-Sheng Chen ,  Heng-Yuan Lee ,  Yen-Ya Hsu ,  Pang-Shiu Chen ,  Ching-Chih Hsu ,  Frederick T. Chen

IPC: G11C11/00

CPC classification number: G11C13/0069 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0071 ,  G11C2013/0073 ,  G11C2213/79

Abstract: A control method for at least one memory cell is disclosed. The memory cell includes a transistor and a resistor. The resistor is connected to the transistor in series between a first node and a second node. In a programming mode, the memory cell is programmed. When it is determined that the memory cell has been successfully programmed, impedance of the memory cell is in a first state. When it is determined that the memory cell has not been successfully programmed, a specific action is executed to reset the memory cell. The impedance of the memory cell is in a second state after the step resetting the memory cell. The impedance of the memory cell in the second state is higher than that of the memory cell in the first state.

Abstract translation: 公开了至少一个存储单元的控制方法。 存储单元包括晶体管和电阻器。 电阻器在第一节点和第二节点之间串联连接到晶体管。 在编程模式下，存储单元被编程。 当确定存储器单元已被成功编程时，存储器单元的阻抗处于第一状态。 当确定存储器单元未成功编程时，执行特定动作来重置存储器单元。 在步骤重置存储单元之后，存储单元的阻抗处于第二状态。 第二状态下的存储单元的阻抗高于第一状态下的存储单元的阻抗。

公开(公告)号：US20130320289A1

公开(公告)日：2013-12-05

申请号：US13612844

申请日：2012-09-13

Applicant: Wei-Su Chen ,  Tai-Yuan Wu ,  Frederick T. Chen ,  Pang-Hsu Chen

Inventor： Wei-Su Chen ,  Tai-Yuan Wu ,  Frederick T. Chen ,  Pang-Hsu Chen

IPC: H01L45/00

CPC classification number: H01L45/145 ,  H01L45/08 ,  H01L45/1608 ,  H01L45/1675

Abstract: A resistance random access memory including a first electrode layer, a second electrode layer, and a stacked structure is provided. The stacked structure includes a HfZrON layer and a ZrON layer and is located between the first electrode layer and the second electrode layer. In addition, the disclosure further provides a method of fabricating a resistance random access memory.

Abstract translation: 提供包括第一电极层，第二电极层和堆叠结构的电阻随机存取存储器。 堆叠结构包括HfZrON层和ZrON层，并且位于第一电极层和第二电极层之间。 另外，本发明还提供一种制造电阻随机存取存储器的方法。

公开(公告)号：US20130170278A1

公开(公告)日：2013-07-04

申请号：US13338264

申请日：2011-12-28

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

IPC: G11C11/21 ,  H01L45/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/51 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistive random access memory (RRAM) cell including a first electrode, a second electrode, and a plurality of repeated sets of layers is provided. Each of the sets of layers includes a resistance-changing layer, a barrier layer, and an ionic exchange layer between the resistance-changing layer and the barrier layer, wherein a thickness of each of the resistance-changing layer, the barrier layer and the ionic exchange layer exceeds a Fermi wavelength, and the thickness each of the resistance-changing layer and ionic exchange layer are less than an electron mean free path. Further, a RRAM module including the aforesaid RRAM cell and a switch is also provided.

Abstract translation: 提供了包括第一电极，第二电极和多个重复的层的电阻随机存取存储器（RRAM）单元。 电阻变化层和阻挡层中的每个层包括电阻变化层，阻挡层和电阻变化层与阻挡层之间的离子交换层，其中电阻变化层，阻挡层和阻挡层 离子交换层超过费米波长，电阻变化层和离子交换层的厚度均小于电子平均自由程。 此外，还提供了包括上述RRAM单元和开关的RRAM模块。

公开(公告)号：US20100006814A1

公开(公告)日：2010-01-14

申请号：US12172162

申请日：2008-07-11

Applicant: Frederick T. Chen ,  Ming-Jinn Tsai

Inventor： Frederick T. Chen ,  Ming-Jinn Tsai

IPC: H01L47/00 ,  H01L21/06

CPC classification number: H01L45/144 ,  H01L45/06 ,  H01L45/122 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/1691

Abstract: A phase-change memory cell is proposed. The phase-change memory includes a bottom electrode; a phase-change spacer formed to contact the bottom electrode; an electrical conductive layer having a vertical portion and a horizontal portion, wherein the electrical conductive layer electrically connects to the phase-change spacer via the horizontal portion; and a top electrode electrically connected to the electrical conductive layer via the vertical portion of the electrically conductive layer.

Abstract translation: 提出了相变存储单元。 相变存储器包括底部电极; 形成为与底部电极接触的相变间隔件; 导电层，其具有垂直部分和水平部分，其中所述导电层经由所述水平部分电连接到所述相变间隔件; 以及通过导电层的垂直部分与导电层电连接的顶部电极。