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    AIR GAP FABRICATING METHOD
    2.
    发明申请
    AIR GAP FABRICATING METHOD 有权
    气隙制造方法

    公开(公告)号：US20110156201A1

    公开(公告)日：2011-06-30

    申请号：US12649333

    申请日：2009-12-30

    申请人： Wei-Su Chen

    发明人： Wei-Su Chen

    IPC分类号： H01L29/06 ,  H01L21/764

    CPC分类号： H01L27/24

    摘要： An air gap fabricating method is provided. A patterned sacrificial layer is formed over a substrate, and the material of the patterned sacrificial layer includes a germanium-antimony-tellurium alloy. A dielectric layer is formed on the patterned sacrificial layer. A reactant is provided to react with the patterned sacrificial layer and the patterned sacrificial layer is removed to form a structure with an air gap disposed at the original position of the patterned sacrificial layer.

    摘要翻译： 提供一种气隙制造方法。 图案化的牺牲层形成在衬底上，并且图案化牺牲层的材料包括锗 - 锑 - 碲合金。 在图案化的牺牲层上形成介电层。 提供反应物以与图案化的牺牲层反应并且去除图案化的牺牲层以形成具有设置在图案化牺牲层的原始位置处的气隙的结构。

    RESISTIVE MEMORY DEVICE AND FABRICATING METHOD THEREOF
    3.
    发明申请
    RESISTIVE MEMORY DEVICE AND FABRICATING METHOD THEREOF 有权
    电阻式存储器件及其制造方法

    公开(公告)号：US20110155991A1

    公开(公告)日：2011-06-30

    申请号：US12649350

    申请日：2009-12-30

    申请人： Wei-Su Chen

    发明人： Wei-Su Chen

    IPC分类号： H01L47/00 ,  H01L21/34

    CPC分类号： H01L27/24

    摘要： A resistive memory device and a fabricating method thereof are introduced herein. In resistive memory device, a plurality of bottom electrodes is disposed in active region of a substrate. Each of the bottom electrodes is disposed to correspond to each of the conductive channels; a patterned resistance switching material layer and the patterned top electrode layer are sequentially stacked on the bottom electrodes. An air dielectric layer exists between the patterned resistance switching material layer and the bottom electrodes. A plurality of patterned interconnections is disposed on the patterned top electrode.

    摘要翻译： 本文介绍了一种电阻式存储器件及其制造方法。 在电阻式存储器件中，多个底部电极设置在衬底的有源区中。 每个底部电极设置成对应于每个导电通道; 图案化的电阻开关材料层和图案化的顶部电极层依次层叠在底部电极上。 在图案化的电阻切换材料层和底部电极之间存在空气介电层。 多个图案化互连设置在图案化的顶部电极上。

    Phase change memory device
    4.
    发明授权
    Phase change memory device 有权
    相变存储器件

    公开(公告)号：US07732801B2

    公开(公告)日：2010-06-08

    申请号：US11797730

    申请日：2007-05-07

    申请人： Wei-Su Chen

    发明人： Wei-Su Chen

    IPC分类号： H01L45/00

    CPC分类号： H01L45/144 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/148 ,  H01L45/1691

    摘要： A phase change memory device is provided. The phase change memory device includes a substrate with a first electrode layer formed thereon. A first phase change memory structure is on the first electrode layer and electrically connected to the first electrode layer. A second phase change memory structure is on the first phase change memory structure and electrically connected to the first phase change memory structure, wherein the first or second phase change memory structure includes a cup-shaped heating electrode. A first insulating layer covers a portion of the cup-shaped heating electrode along a first direction. A first electrode structure covers a portion of the first insulating layer and the cup-shaped heating electrode along a second direction. The first electrode structure includes a pair of phase change material sidewalls on a pair of sidewalls of the first electrode structure and covering a portion of the cup-shaped heating electrode.

    摘要翻译： 提供了相变存储器件。 相变存储器件包括其上形成有第一电极层的衬底。 第一相变存储器结构在第一电极层上并且电连接到第一电极层。 第二相变存储器结构位于第一相变存储器结构上并电连接到第一相变存储器结构，其中第一或第二相变存储器结构包括杯形加热电极。 第一绝缘层沿着第一方向覆盖杯形加热电极的一部分。 第一电极结构沿第二方向覆盖第一绝缘层和杯形加热电极的一部分。 第一电极结构包括在第一电极结构的一对侧壁上的一对相变材料侧壁，并且覆盖杯形加热电极的一部分。

    Semiconductor memory device and phase change memory device
    5.
    发明授权
    Semiconductor memory device and phase change memory device 失效
    半导体存储器件和相变存储器件

    公开(公告)号：US07728320B2

    公开(公告)日：2010-06-01

    申请号：US11463899

    申请日：2006-08-11

    申请人： Wei-Su Chen

    发明人： Wei-Su Chen

    IPC分类号： H01L47/00

    CPC分类号： H01L27/2463 ,  H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/1691

    摘要： A phase change memory (PCM) device includes a substrate, bottom electrodes disposed in the substrate, a first dielectric layer disposed on the substrate, second dielectric layers, third dielectric layers, cup-shaped thermal electrodes, top electrodes, and PC material spacers. In the PCM device, each cup-shaped thermal electrode contacts with each bottom electrode. Second and third dielectric layers are disposed over the substrate in different directions, wherein each of the second and third dielectric layers covers a portion of the area surrounded by each cup-shaped thermal electrode, and the third dielectric layers overlay the second dielectric layers. The top electrodes are disposed on the third dielectric layers, wherein a plurality of stacked structure composed of the third dielectric layers and the top electrodes are formed thereon. The PC material spacers are formed on the sidewalls of each stacked structure and physically and electrically contact the cup-shaped thermal electrodes and the top electrodes.

    摘要翻译： 相变存储器（PCM）装置包括基板，设置在基板中的底部电极，设置在基板上的第一介电层，第二介电层，第三电介质层，杯形热电极，顶部电极和PC材料间隔物。 在PCM装置中，每个杯状热电极与每个底部电极接触。 第二和第三电介质层设置在不同方向上的衬底上，其中第二和第三电介质层中的每一个覆盖由每个杯形热电极包围的区域的一部分，并且第三电介质层覆盖第二电介质层。 顶部电极设置在第三电介质层上，其中在其上形成由第三电介质层和顶部电极构成的多个层叠结构。 PC材料间隔件形成在每个堆叠结构的侧壁上，并与杯状热电极和顶部电极物理和电接触。

    STRUCTURE HAVING NANO-HOLE AND FABRICATING METHOD THEREOF, TIP ARRAY STRUCTURE AND FABRICATING METHOD OF TIP STRUCTURE
    7.
    发明申请
    STRUCTURE HAVING NANO-HOLE AND FABRICATING METHOD THEREOF, TIP ARRAY STRUCTURE AND FABRICATING METHOD OF TIP STRUCTURE 有权
    具有纳米孔的结构及其制造方法，尖端结构和制造方法的尖端结构

    公开(公告)号：US20080160285A1

    公开(公告)日：2008-07-03

    申请号：US11737768

    申请日：2007-04-20

    申请人： Wei-Su Chen

    发明人： Wei-Su Chen

    IPC分类号： G21K1/00 ,  B32B3/26 ,  G03C5/00

    CPC分类号： G03F7/405 ,  B82Y15/00 ,  Y10S977/875 ,  Y10T428/249979

    摘要： A fabricating method of a structure having nano-hole is provided. The fabricating method includes: providing a substrate, forming a photoresist layer on the substrate, forming an opening, and performing a heat treatment process on the photoresist layer to shrink the opening to form a nano-hole. The structure having nano-hole fabricated by the method of the present invention can be used to fabricate a nano-tip having a diameter of tip-body of no more than 10 mm, high aspect ratio, and a uniform diameter of tip-body.

    摘要翻译： 提供了具有纳米孔结构的制造方法。 制造方法包括：提供基板，在基板上形成光致抗蚀剂层，形成开口，并在光致抗蚀剂层上进行热处理工艺以收缩开口以形成纳米孔。 通过本发明的方法制造的具有纳米孔的结构可用于制造具有不超过10mm的尖端直径，高纵横比和尖端体直径均匀的纳米尖端。

    Phase change memory device and fabricating method therefor
    8.
    发明申请
    Phase change memory device and fabricating method therefor 失效
    相变存储器件及其制造方法

    公开(公告)号：US20070148855A1

    公开(公告)日：2007-06-28

    申请号：US11479497

    申请日：2006-06-30

    申请人： Wei-Su Chen ,  Yi-Chan Chen ,  Wen-Han Wang ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Min-Hung Lee

    发明人： Wei-Su Chen ,  Yi-Chan Chen ,  Wen-Han Wang ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Min-Hung Lee

    IPC分类号： H01L21/8244 ,  H01L21/8238 ,  H01L21/00 ,  H01L21/20

    CPC分类号： H01L45/06 ,  H01L45/122 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： A phase change memory device and fabricating method are provided. A disk-shaped phase change layer is buried within the insulating material. A center via and ring via are formed by a lithography. The center via is located in the center of the phase change layer and passes through the phase change layer, and the ring via takes the center via as a center. A heating electrode within the center via performs Joule heating of the phase change layer, and the contact area between the phase change layer and the heating electrode is reduced by controlling the thickness of the phase change layer. Furthermore, a second electrode within the ring via dissipates the heat transmitted to the contact interface between the phase change layers, so as to avoid transmitting the heat to the etching boundary at the periphery of the phase change layer.

    摘要翻译： 提供了一种相变存储器件及其制造方法。 盘状相变层被埋在绝缘材料内。 通过光刻形成中心通孔和环形通孔。 中心通孔位于相变层的中心，通过相变层，环形通孔以中心通孔为中心。 中心通孔内的加热电极进行相变层的焦耳加热，通过控制相变层的厚度来降低相变层与加热电极之间的接触面积。 此外，环通孔内的第二电极耗散了传递到相变层之间的接触界面的热量，以避免将热量传递到相变层周围的蚀刻边界。

    Organic light emitting diode device with organic hole transporting material and phosphorescent material
    10.
    发明授权
    Organic light emitting diode device with organic hole transporting material and phosphorescent material 有权
    具有有机空穴传输材料和磷光材料的有机发光二极管器件

    公开(公告)号：US06822257B2

    公开(公告)日：2004-11-23

    申请号：US10248553

    申请日：2003-01-29

    申请人： Yung-Chih Lee ,  Wei-Su Chen ,  Chi-Chih Liao ,  Jiun-Haw Lee

    发明人： Yung-Chih Lee ,  Wei-Su Chen ,  Chi-Chih Liao ,  Jiun-Haw Lee

    IPC分类号： H01L3524

    CPC分类号： H01L51/5016 ,  H01L51/0059 ,  H01L51/0062 ,  H01L51/0077 ,  H01L51/0081 ,  H01L51/5096

    摘要： An organic light emitting diode (OLED) device comprises a substrate, an anode layer, a luminescence layer, a hole blocking layer and a cathode layer. The anode layer is disposed on the substrate; the luminescence layer is disposed on the anode layer; the hole blocking layer is disposed on the luminescence layer; the cathode layer is disposed on the hole blocking layer. In addition the luminescence layer comprises a hole transporting material and a phosphorescent material, wherein the weight percentage of the bole transporting material and the phosphorescent material is between 40%˜60%.

    摘要翻译： 有机发光二极管（OLED）器件包括衬底，阳极层，发光层，空穴阻挡层和阴极层。 阳极层设置在基板上; 发光层设置在阳极层上; 空穴阻挡层设置在发光层上; 阴极层设置在空穴阻挡层上。 此外，发光层包括空穴传输材料和磷光材料，其中，所述布纹输送材料和磷光材料的重量百分比为40％〜60％。