公开(公告)号：US20130168631A1

公开(公告)日：2013-07-04

申请号：US13342171

申请日：2012-01-02

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L27/26 ,  H01L47/00

CPC classification number: G11C14/009 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1675

Abstract: The disclosure provides a non-volatile memory structure and a method for fabricating the same. The non-volatile memory structure includes a first contact connected to a first transistor. A second contact is connected to a second transistor. A resistance-changing memory material pattern covers and contacts the second contact but not the first contact. A top electrode contacts both the resistance-changing memory material pattern and the first contact. An area of the resistance-changing memory material pattern is substantially larger than an area of its interface with the second contact.

Abstract translation: 本公开提供了一种非易失性存储器结构及其制造方法。 非易失性存储器结构包括连接到第一晶体管的第一触点。 第二触点连接到第二晶体管。 电阻变化记忆材料图案覆盖并接触第二接触件而不是第一接触件。 顶部电极接触电阻变化记忆材料图案和第一接触。 电阻变化记忆材料图案的面积显着大于其与第二接触面的界面的面积。

公开(公告)号：US20120020140A1

公开(公告)日：2012-01-26

申请号：US12839411

申请日：2010-07-20

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: G11C11/00 ,  H01L45/00 ,  H01L21/8239

CPC classification number: G11C11/22

Abstract: A resistive memory cell is described, including a first electrode, a high-resistance ferroelectric material layer and a second electrode. The ferroelectric material layer has a first interface with the first electrode and has a second interface with the second electrode, wherein the second interface is not parallel with the first interface. A method of operating the resistive memory cell is also described, including applying between the first electrode and the second electrode a series of voltages, which has positive polarity and negative polarity alternately and has descending absolute values, to form in the ferroelectric material layer at least one domain wall with low resistance.

Abstract translation: 描述了一种电阻式存储单元，包括第一电极，高电阻铁电材料层和第二电极。 所述铁电材料层具有与所述第一电极的第一界面，并且具有与所述第二电极的第二界面，其中所述第二界面不与所述第一界面平行。 还描述了操作电阻式存储单元的方法，包括在第一电极和第二电极之间交替地具有正极性和负极性并且具有下降绝对值的一系列电压，以至少在铁电材料层中形成 一个具有低电阻的畴壁。

公开(公告)号：US08711601B2

公开(公告)日：2014-04-29

申请号：US13338264

申请日：2011-12-28

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

IPC: G11C11/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/51 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistive random access memory (RRAM) cell including a first electrode, a second electrode, and a plurality of repeated sets of layers is provided. Each of the sets of layers includes a resistance-changing layer, a barrier layer, and an ionic exchange layer between the resistance-changing layer and the barrier layer, wherein a thickness of each of the resistance-changing layer, the barrier layer and the ionic exchange layer exceeds a Fermi wavelength, and the thickness each of the resistance-changing layer and ionic exchange layer are less than an electron mean free path. Further, a RRAM module including the aforesaid RRAM cell and a switch is also provided.

Abstract translation: 提供了包括第一电极，第二电极和多个重复的层的电阻随机存取存储器（RRAM）单元。 电阻变化层和阻挡层中的每个层包括电阻变化层，阻挡层和电阻变化层与阻挡层之间的离子交换层，其中电阻变化层，阻挡层和阻挡层 离子交换层超过费米波长，电阻变化层和离子交换层的厚度均小于电子平均自由程。 此外，还提供了包括上述RRAM单元和开关的RRAM模块。

公开(公告)号：US20140077149A1

公开(公告)日：2014-03-20

申请号：US13615683

申请日：2012-09-14

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen ,  Wei-Su Chen ,  Tai-Yuan Wu ,  Pang-Hsu Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen ,  Wei-Su Chen ,  Tai-Yuan Wu ,  Pang-Hsu Chen

IPC: H01L27/24 ,  H01L45/00

CPC classification number: G11C13/0007 ,  G11C2213/15 ,  G11C2213/56 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistance memory cell including a variable resistance layer is provided. The variable resistance layer includes at least one dominant resistance layer and at least one auxiliary resistance layer. The dominant resistance layer(s) and the auxiliary resistance layer(s) in totality form a closed ion exchange system, the exchanged ions are comparably mobile in each of the dominant resistance layer(s) and the auxiliary resistance layer(s), and the maximum resistance of the at least one dominant resistance layer is higher than that of the at least one auxiliary resistance layer.

Abstract translation: 提供了包括可变电阻层的电阻存储单元。 可变电阻层包括至少一个显性电阻层和至少一个辅助电阻层。 主要电阻层和辅助电阻层总体上形成封闭的离子交换系统，交换的离子在每个主要电阻层和辅助电阻层中是可比较的，以及 至少一个主要电阻层的最大电阻高于至少一个辅助电阻层的最大电阻。

公开(公告)号：US08642985B2

公开(公告)日：2014-02-04

申请号：US13173945

申请日：2011-06-30

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

IPC: H01L45/00

CPC classification number: G11C13/0007 ,  G11C13/003 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/74 ,  G11C2213/76 ,  H01L27/2418 ,  H01L27/2427 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/146

Abstract: A memory cell includes a memory element, a current-limiting element electrically coupled to the memory element, and a high-selection-ratio element electrically coupled to the current-limiting element. The memory element is configured to store data as a resistance state. The current-limiting element is a voltage-controlled resistor (VCR) having a resistance that decreases when a voltage applied thereto increases. The high-selection-ratio element has a first resistance that is small when a voltage applied to the memory cell is approximately equal to a selection voltage of the memory cell, and has a second resistance that is substantially larger than the first resistance when the voltage applied to the memory cell is approximately equal to one-half of the selection voltage.

Abstract translation: 存储单元包括存储元件，电耦合到存储元件的限流元件，以及电耦合到限流元件的高选择比元件。 存储元件被配置为将数据存储为电阻状态。 限流元件是具有当施加的电压增加时电阻降低的压控电阻器（VCR）。 高选择比元件在施加到存储单元的电压近似等于存储单元的选择电压时具有小的第一电阻，并且具有比电压的第一电阻显着大于第一电阻的第二电阻 施加到存储单元大约等于选择电压的一半。

公开(公告)号：US20100230653A1

公开(公告)日：2010-09-16

申请号：US12405173

申请日：2009-03-16

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00 ,  H01L21/762

CPC classification number: H01L45/144 ,  H01L45/06 ,  H01L45/124 ,  H01L45/1691

Abstract: A phase-change memory element is provided. The phase-change memory element includes: a first electrode formed on a substrate; a first dielectric layer, with an opening, formed on the first electrode, wherein the opening exposes a top surface of the first electrode; a pillar structure formed directly on the first electrode within the opening; an inner phase-change material layer surrounding the pillar structure, directly contacting the first electrode; a second dielectric layer surrounding the inner phase-change material layer; an outer phase-change material layer surrounding the second dielectric layer; a phase-change material collar formed between the second dielectric layer and the first electrode, connecting the inner phase-change material layer with the outer phase-change material layer; and a second electrode formed directly on the pillar structure, directly contacting the top surface of the inner phase-change material layer.

Abstract translation: 提供了相变存储元件。 相变存储元件包括：形成在基板上的第一电极; 具有开口的第一电介质层，形成在所述第一电极上，其中所述开口暴露所述第一电极的顶表面; 直立在开口内的第一电极上的柱结构; 围绕所述柱结构的内相变材料层，直接接触所述第一电极; 围绕所述内相变材料层的第二介电层; 围绕所述第二介电层的外相变材料层; 形成在所述第二电介质层和所述第一电极之间的相变材料套环，将所述内部相变材料层与所述外部相变材料层连接; 以及直接形成在柱状结构上的与内部相变材料层的顶面直接接触的第二电极。

公开(公告)号：US20090057643A1

公开(公告)日：2009-03-05

申请号：US11850019

申请日：2007-09-04

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/122 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1691

Abstract: A phase change memory device is disclosed. A second conductive spacer is under a first conductive spacer. A phase change layer comprises a first portion substantially parallel to the first and second conductive spacers and a second portion on top of the second conductive spacer, wherein the second conductive spacer is electrically connected to the first conductive spacer through the second portion of the phase change layer.

Abstract translation: 公开了一种相变存储器件。 第二导电间隔物位于第一导电间隔物下方。 相变层包括基本上平行于第一和第二导电间隔物的第一部分和位于第二导电间隔物的顶部上的第二部分，其中第二导电间隔物通过相变的第二部分电连接到第一导电间隔物 层。

公开(公告)号：US20090042391A1

公开(公告)日：2009-02-12

申请号：US11834579

申请日：2007-08-06

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L21/311

CPC classification number: H01L21/0337 ,  H01L21/0338

Abstract: A method for forming patterns comprises providing a substrate. A set of seed features is formed over the substrate. At least one bi-layer comprising a first layer followed by a second layer is formed on the set of seed features. The first layer and the second layer above the set of seed features are removed. The first layer and the second layer are anisotropically etched successively at least one time to form an opening next to the set of seed features.

Abstract translation: 用于形成图案的方法包括提供基底。 在衬底上形成一组种子特征。 在该组种子特征上形成至少一个包含第一层和第二层的双层。 去除了一组种子特征之上的第一层和第二层。 第一层和第二层被连续地各向异性蚀刻至少一次，以形成一组种子特征旁边的开口。

公开(公告)号：US08691478B2

公开(公告)日：2014-04-08

申请号：US13607823

申请日：2012-09-10

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: G03F1/32

CPC classification number: G03F1/32

Abstract: An attenuated phase shift mask (AttPSM) is fabricated with a set of fully transmitting regions, some parts adjacent phase-shifting regions with a first reduced transmission and first phase shift near 180 degrees, and remaining parts adjacent phase-shifting regions with a second transmission higher than the first transmission and second phase shift lower than the first phase shift.

Abstract translation: 衰减相移掩模（AttPSM）由一组完全传输区域制成，一些部分邻近移相区域，第一次降低的传输和第一相移接近180度，并且具有第二传输的相邻相移区域的剩余部分 高于第一相移和第二相移比第一相移低。

公开(公告)号：US20140072902A1

公开(公告)日：2014-03-13

申请号：US13607823

申请日：2012-09-10

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: G03F1/32

CPC classification number: G03F1/32

Abstract: An attenuated phase shift mask (AttPSM) is fabricated with a set of fully transmitting regions, some parts adjacent phase-shifting regions with a first reduced transmission and first phase shift near 180 degrees, and remaining parts adjacent phase-shifting regions with a second transmission higher than the first transmission and second phase shift lower than the first phase shift.

Abstract translation: 衰减相移掩模（AttPSM）由一组完全传输区域制成，一些部分邻近移相区域，第一次降低的传输和第一相移接近180度，并且具有第二传输的相邻相移区域的剩余部分 高于第一相移和第二相移比第一相移低。