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公开(公告)号:US10008491B1
公开(公告)日:2018-06-26
申请号:US15655274
申请日:2017-07-20
Applicant: GLOBALFOUNDRIES INC.
Inventor: You Li , Robert J. Gauthier, Jr. , Souvick Mitra , Mickey Yu
IPC: H01L27/02 , H01L29/861 , H01L23/66
CPC classification number: H01L27/0262 , H01L23/66 , H01L27/0255 , H01L29/861
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to low capacitance electrostatic discharge (ESD) devices and methods of manufacture. The structure includes: a first structure comprising a pattern of a first diffusion region, a second diffusion region and a third diffusion region partly extending over a first well; and a second structure comprising a fourth diffusion region in a second well electrically connecting to the first structure to form a silicon controlled rectifier (SCR) on a bulk region of a substrate.
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12.
公开(公告)号:US09704852B2
公开(公告)日:2017-07-11
申请号:US15140516
申请日:2016-04-28
Applicant: GLOBALFOUNDRIES INC.
Inventor: Robert J. Gauthier, Jr. , Tom C. Lee , You Li , Rahul Mishra , Souvick Mitra , Andreas Scholze
IPC: H01L29/66 , H01L29/15 , H01L27/088 , H01L27/02 , H01L27/06 , H01L29/78 , H01L29/06 , H01L29/423
CPC classification number: H01L27/0255 , H01L27/0266 , H01L27/027 , H01L27/0288 , H01L27/0629 , H01L29/0649 , H01L29/0684 , H01L29/42372 , H01L29/7827 , H01L29/785 , H01L29/7855 , H01L2029/7858
Abstract: Field effect diode structures utilize a junction structure that has an L-shape in cross-section (a fin extending from a planar portion). An anode is positioned at the top surface of the fin, and a cathode is positioned at the end surface of the planar portion. The perpendicularity of the fin and the planar portion cause the anode and cathode to be perpendicular to one another. A first gate insulator contacts the fin between the top surface and the planar portion. A first gate conductor contacts the first gate insulator, and the first gate insulator is between the first gate conductor and the surface of the fin. Additionally, a second gate insulator contacts the planar portion between the end surface and the fin. A second gate conductor contacts the second gate insulator, and the second gate insulator is between the second gate conductor and the surface of the planar portion.
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公开(公告)号:US09536870B2
公开(公告)日:2017-01-03
申请号:US14977737
申请日:2015-12-22
Applicant: GLOBALFOUNDRIES INC.
Inventor: James P. Di Sarro , Robert J. Gauthier, Jr. , Tom C. Lee , Junjun Li , Souvick Mitra , Christopher S. Putnam
CPC classification number: H01L27/0262 , G06F17/5063 , G06F17/5072 , H01L29/0649 , H01L29/0657 , H01L29/66121 , H01L29/66393 , H01L29/7408 , H01L29/7412 , H01L29/742 , H01L29/7436 , H01L29/861
Abstract: An electrostatic discharge protection circuit is disclosed. A method of manufacturing a semiconductor structure includes forming a semiconductor controlled rectifier including a first plurality of fingers between an n-well body contact and an anode in an n-well, and a second plurality of fingers between a p-well body contact and a cathode in a p-well.
Abstract translation: 公开了一种静电放电保护电路。 一种制造半导体结构的方法包括在n阱中形成包括n阱体接触和阳极之间的第一多个指状物的半导体可控整流器,以及p阱体接触件和 阴极在p阱中。
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公开(公告)号:US09263402B2
公开(公告)日:2016-02-16
申请号:US14554643
申请日:2014-11-26
Applicant: GLOBALFOUNDRIES INC.
Inventor: James P. Di Sarro , Robert J. Gauthier, Jr. , Junjun Li
CPC classification number: H01L23/60 , H01L21/84 , H01L27/0251 , H01L27/1203 , H01L29/66545 , H01L29/66636 , H01L29/7841 , H01L2924/0002 , H01L2924/00
Abstract: Device structures, design structures, and fabrication methods for a metal-oxide-semiconductor field-effect transistor. A gate structure is formed on a top surface of a substrate. First and second trenches are formed in the substrate adjacent to a sidewall of the gate structure. The second trench is formed laterally between the first trench and the first sidewall. First and second epitaxial layers are respectively formed in the first and second trenches. A contact is formed to the first epitaxial layer, which serves as a drain. The second epitaxial layer in the second trench is not contacted so that the second epitaxial layer serves as a ballasting resistor.
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15.
公开(公告)号:US09236398B2
公开(公告)日:2016-01-12
申请号:US14513709
申请日:2014-10-14
Applicant: GLOBALFOUNDRIES INC.
Inventor: William F. Clark, Jr. , Robert J. Gauthier, Jr. , Terence B. Hook , Junjun Li , Theodorus E. Standaert , Thomas A. Wallner
IPC: H01L29/66 , H01L21/338 , H01L27/12 , H01L29/78 , H01L21/84 , H01L21/8238 , H01L27/02 , H01L21/762 , H01L27/092
CPC classification number: H01L27/1211 , H01L21/7624 , H01L21/823821 , H01L21/845 , H01L27/0207 , H01L27/0262 , H01L27/0924 , H01L27/1203 , H01L29/66795 , H01L29/785
Abstract: Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.
Abstract translation: 无源器件的器件结构和设计结构,可用作鳍式场效应晶体管集成电路技术中的静电放电保护器件。 器件区域形成在沟槽中并且与绝缘体上半导体衬底的处理晶片耦合。 器件区域延伸穿过绝缘体上半导体衬底的掩埋绝缘体层朝向绝缘体上半导体衬底的器件层的顶表面。 器件区域由轻掺杂的半导体材料组成。 器件结构还包括形成在器件区域中并限定结的掺杂区域。 器件区域的一部分横向地位于绝缘体上半导体衬底的掺杂区域和掩埋绝缘体层之间。 可以对器件层的另一区域进行构图以形成翅片型场效应晶体管的鳍片。
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