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公开(公告)号:US09679837B2
公开(公告)日:2017-06-13
申请号:US15082501
申请日:2016-03-28
Applicant: General Electric Company
Inventor: Paul Alan McConnelee , Kevin Matthew Durocher , Scott Smith , Donald Paul Cunningham
IPC: H01L29/40 , H01L23/498 , H01L23/538 , H01L23/00 , H01L21/48
CPC classification number: H01L23/49838 , H01L21/4857 , H01L21/486 , H01L23/49805 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/49866 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/92144 , H01L2924/01029 , H01L2924/12042 , H01L2924/14 , H01L2924/00
Abstract: An electrical interconnect assembly includes an insulating substrate, upper conductive pads coupled to a top surface of the insulating substrate, and lower conductive pads coupled to a bottom surface of the insulating substrate. The upper conductive pads and the lower conductive pads comprise an electrically conductive material. A metallization layer is deposited on the top surface of the insulating substrate and the upper conductive pads. The metallization layer extends through vias formed through a thickness of the insulating substrate to contact a top surface of the lower conductive pads.
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12.
公开(公告)号:US09236348B2
公开(公告)日:2016-01-12
申请号:US14188093
申请日:2014-02-24
Applicant: General Electric Company
Inventor: Paul Alan McConnelee , Scott Smith , Elizabeth Ann Burke
IPC: H01L23/12 , H01L21/00 , H05K1/00 , H01L23/538 , H01L21/56 , H01L23/31 , H01L23/00 , H05K1/18 , H01L23/522 , H01L23/48 , H01L21/48 , H05K3/46 , H01L25/10 , H01L21/60
CPC classification number: H01L23/5383 , H01L21/4857 , H01L21/561 , H01L23/3114 , H01L23/481 , H01L23/5226 , H01L23/5384 , H01L23/5386 , H01L23/5387 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/25 , H01L25/105 , H01L2021/60 , H01L2224/04105 , H01L2224/12105 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267 , H01L2224/92144 , H01L2224/92244 , H01L2225/1035 , H01L2225/1058 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15313 , H01L2924/3511 , H05K1/0271 , H05K1/144 , H05K1/185 , H05K1/189 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K3/467 , H05K3/4673 , H05K2201/0187 , H05K2201/0191 , H05K2201/09136 , H05K2201/10734 , H01L2924/00
Abstract: A method of forming a buried die module includes providing an initial laminate flex layer and forming a die opening through the initial laminate flex layer. A first uncut laminate flex layer is secured to the first surface of the initial laminate flex layer by way of an adhesive material and a die is positioned within the die opening of the initial laminate flex layer and onto the adhesive material. A second uncut laminate flex layer is secured to the second surface of the initial laminate flex layer by way of an adhesive material and the adhesive materials are then cured. Vias and metal interconnects are formed in and on the first and second uncut laminate flex layers, with each of the metal interconnects extending through a respective via and being directly metalized to a metal interconnect on the initial laminate flex layer or a die pad on the die.
Abstract translation: 形成掩埋模具模块的方法包括提供初始层叠柔性层并通过初始层压柔性层形成模具开口。 第一未切割层压柔性层通过粘合剂材料固定到初始层压柔性层的第一表面,并且模具定位在初始层压柔性层的模具开口内并粘附到粘合剂材料上。 第二未切割层压柔性层通过粘合剂材料固定到初始层压柔性层的第二表面上,然后固化粘合剂材料。 在第一和第二未切割的层叠柔性层中和第二未切割的层叠柔性层上形成通孔和金属互连,其中每个金属互连件延伸通过相应的通孔,并且直接金属化到初始层压柔性层上的金属互连或模具上的管芯焊盘 。
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13.
公开(公告)号:US20140183750A1
公开(公告)日:2014-07-03
申请号:US14188093
申请日:2014-02-24
Applicant: General Electric Company
Inventor: Paul Alan McConnelee , Scott Smith , Elizabeth Ann Burke
CPC classification number: H01L23/5383 , H01L21/4857 , H01L21/561 , H01L23/3114 , H01L23/481 , H01L23/5226 , H01L23/5384 , H01L23/5386 , H01L23/5387 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/25 , H01L25/105 , H01L2021/60 , H01L2224/04105 , H01L2224/12105 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267 , H01L2224/92144 , H01L2224/92244 , H01L2225/1035 , H01L2225/1058 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15313 , H01L2924/3511 , H05K1/0271 , H05K1/144 , H05K1/185 , H05K1/189 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K3/467 , H05K3/4673 , H05K2201/0187 , H05K2201/0191 , H05K2201/09136 , H05K2201/10734 , H01L2924/00
Abstract: A method of forming a buried die module includes providing an initial laminate flex layer and forming a die opening through the initial laminate flex layer. A first uncut laminate flex layer is secured to the first surface of the initial laminate flex layer by way of an adhesive material and a die is positioned within the die opening of the initial laminate flex layer and onto the adhesive material. A second uncut laminate flex layer is secured to the second surface of the initial laminate flex layer by way of an adhesive material and the adhesive materials are then cured. Vias and metal interconnects are formed in and on the first and second uncut laminate flex layers, with each of the metal interconnects extending through a respective via and being directly metalized to a metal interconnect on the initial laminate flex layer or a die pad on the die.
Abstract translation: 形成掩埋模具模块的方法包括提供初始层叠柔性层并通过初始层压柔性层形成模具开口。 第一未切割层压柔性层通过粘合剂材料固定到初始层压柔性层的第一表面,并且模具定位在初始层压柔性层的模具开口内并粘附到粘合剂材料上。 第二未切割层压柔性层通过粘合剂材料固定到初始层压柔性层的第二表面上,然后固化粘合剂材料。 在第一和第二未切割的层叠柔性层中和第二未切割的层叠柔性层上形成通孔和金属互连,其中每个金属互连件延伸通过相应的通孔,并且直接金属化到初始层压柔性层上的金属互连或模具上的管芯焊盘 。
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公开(公告)号:US20140110866A1
公开(公告)日:2014-04-24
申请号:US14138333
申请日:2013-12-23
Applicant: General Electric Company
Inventor: Paul Alan McConnelee , Kevin Matthew Durocher , Scott Smith , Laura A. Principe
IPC: H01L23/00 , H01L23/522
CPC classification number: H01L23/562 , H01L23/5226 , H01L24/19 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/82 , H01L24/83 , H01L24/97 , H01L2224/04105 , H01L2224/29101 , H01L2224/2919 , H01L2224/82039 , H01L2224/82047 , H01L2224/83101 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2224/92 , H01L2224/92144 , H01L2224/97 , H01L2924/01005 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15151 , H01L2924/17151 , H01L2924/19105 , H01L2224/83 , H01L2224/82 , H01L2924/00
Abstract: A system and method for chip package fabrication is disclosed. The chip package includes a base re-distribution layer having an opening formed therein, an adhesive layer having a window formed therein free of adhesive material, and a die affixed to the base re-distribution layer by way of the adhesive layer, the die being aligned with the window such that only a perimeter of the die contacts the adhesive layer. A shield element is positioned between the base re-distribution layer and adhesive layer that is generally aligned with the opening formed in the base re-distribution layer and the window of the adhesive layer such that only a perimeter of the shield element is attached to the adhesive layer. The shield element is separated from the die by an air gap and is configured to be selectively removable from the adhesive layer so as to expose the front surface of the die.
Abstract translation: 公开了一种用于芯片封装制造的系统和方法。 芯片封装包括其中形成有开口的基底再分布层,具有形成在其中的没有粘合材料的窗口的粘合剂层和通过粘合剂层固定到基底再分布层的模具,模具是 与窗口对齐,使得只有模具的周边接触粘合剂层。 屏蔽元件位于基底再分布层和粘合剂层之间,该粘合剂层通常与形成在基底再分布层中的开口和粘合剂层的窗口对齐,使得仅屏蔽元件的周边附着到 粘合剂层。 屏蔽元件通过气隙与模具分离,并且被配置为可选择性地从粘合剂层移除以暴露模具的前表面。
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