公开(公告)号：US20200303505A1

公开(公告)日：2020-09-24

申请号：US16673017

申请日：2019-11-04

Applicant: Hitachi, Ltd.

Inventor： Masahiro MASUNAGA ,  Shintaroh SATO ,  Akio SHIMA ,  Ryo KUWANA ,  Isao HARA

IPC: H01L29/16 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28

Abstract: An n type semiconductor layer is formed over an n type semiconductor substrate made of silicon carbide, a p type impurity region is formed in the semiconductor layer, and an n type drain region and an n type source region are formed in the impurity region. A field insulating film having an opening that selectively opens a part of the impurity region located between the drain and source regions is formed over the impurity region and the drain and source regions. A gate insulating film is formed over the impurity region in the opening, and a gate electrode is formed on the gate insulating film. Here, a field relaxation layer having an impurity concentration higher than that of the impurity region is formed in at least a part of the impurity region located between the drain and source regions in plan view and located below the field insulating film.

公开(公告)号：US20190148546A1

公开(公告)日：2019-05-16

申请号：US16167982

申请日：2018-10-23

Applicant: HITACHI, LTD.

Inventor： Shintaroh SATO ,  Masahiro MASUNAGA ,  Akio SHIMA

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/51 ,  H01L27/092 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L29/08 ,  H01L21/04 ,  H01L21/311

CPC classification number: H01L29/7834 ,  H01L21/0465 ,  H01L21/0475 ,  H01L21/31116 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/1608 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66068 ,  H01L29/6659

Abstract: There is provided a semiconductor device that improves reliability. The impurity concentrations of a p|| source region and a p|| drain region are 5×1020 cm−3 or more. The channel-region-side end portion of a first insulating film is disposed on a p+ source region. The end portion has an inclined surface where the first insulating film thickness is reduced from the p− source region toward a channel region. The channel-region-side end portion of a second insulating film is disposed on a p+ drain region. The end portion has an inclined surface where the second insulating film thickness is reduced from the p+ drain region toward the channel region. A gate electrode is disposed on the channel region, the p+ source region, the p+ drain region, and the inclined surfaces of the first and the second insulating films through a gate insulating film including an aluminum oxide film.