公开(公告)号：US20250088157A1

公开(公告)日：2025-03-13

申请号：US18586906

申请日：2024-02-26

Applicant: Hitachi, Ltd.

Inventor： Masahiro MASUNAGA ,  Shinji NOMOTO ,  Ryo KUWANA ,  Isao HARA

IPC: H03F3/45

Abstract: Provided is a semiconductor device including: an amplifier configured by an element made of silicon carbide, and including a differential amplifier circuit that amplifies an input signal; and a power supply circuit that supplies a voltage to the amplifier. Here, the voltage fluctuation amount reduction circuit is inserted between the power supply circuit and the amplifier. As a result, it possible to appropriately eliminate an influence of drift when the amplifier is configured by a semiconductor made of silicon carbide.

公开(公告)号：US20210050348A1

公开(公告)日：2021-02-18

申请号：US16937061

申请日：2020-07-23

Applicant: Hitachi, Ltd.

Inventor： Ryo KUWANA ,  Masahiro MASUNAGA ,  Mutsumi SUZUKI ,  Isao HARA

IPC: H01L27/088 ,  H01L23/00 ,  H01L23/498 ,  G01L9/00 ,  G21C17/00

Abstract: Provided is a SiC semiconductor element equipped with a SiC integrated circuit having a stable characteristic, which operates normally even in a radiation environment. A radiation resistant circuit device includes: a SiC semiconductor element equipped with a SiC integrated circuit, a printed board on which the SiC semiconductor element is provided, a conductive wiring that is arranged inside the printed board and has a predetermined surface facing a bottom surface of a substrate electrode of the SiC integrated circuit, and an insulating material arranged between the bottom surface of the substrate electrode of the SiC integrated circuit and the predetermined surface of the conductive wiring.

公开(公告)号：US20190326393A1

公开(公告)日：2019-10-24

申请号：US16265455

申请日：2019-02-01

Applicant: HITACHI, LTD.

Inventor： Masahiro MASUNAGA ,  Akio SHIMA ,  Shintaroh SATO ,  Ryo KUWANA

IPC: H01L29/06 ,  H01L29/08 ,  H01L23/535 ,  H01L29/10 ,  H01L29/417 ,  H01L29/66 ,  H01L29/16 ,  H01L29/45

Abstract: A MOSFET that has a drain region and a source region on an upper surface of a semiconductor substrate and a gate electrode that is formed on the semiconductor substrate, and an element separation insulating film that includes an opening portion which exposes an active region, on the semiconductor substrate, are formed. At this point, a gate leading-out interconnection that overlaps the element separation insulating film when viewed from above, and that is integrally combined with the gate electrode is formed in a position where the gate leading-out interconnection does not extend over a distance between both the drain region and the source region when viewed from above, on a region that is exposed from the gate electrode.

公开(公告)号：US20200303505A1

公开(公告)日：2020-09-24

申请号：US16673017

申请日：2019-11-04

Applicant: Hitachi, Ltd.

Inventor： Masahiro MASUNAGA ,  Shintaroh SATO ,  Akio SHIMA ,  Ryo KUWANA ,  Isao HARA

IPC: H01L29/16 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28

Abstract: An n type semiconductor layer is formed over an n type semiconductor substrate made of silicon carbide, a p type impurity region is formed in the semiconductor layer, and an n type drain region and an n type source region are formed in the impurity region. A field insulating film having an opening that selectively opens a part of the impurity region located between the drain and source regions is formed over the impurity region and the drain and source regions. A gate insulating film is formed over the impurity region in the opening, and a gate electrode is formed on the gate insulating film. Here, a field relaxation layer having an impurity concentration higher than that of the impurity region is formed in at least a part of the impurity region located between the drain and source regions in plan view and located below the field insulating film.

公开(公告)号：US20190148546A1

公开(公告)日：2019-05-16

申请号：US16167982

申请日：2018-10-23

Applicant: HITACHI, LTD.

Inventor： Shintaroh SATO ,  Masahiro MASUNAGA ,  Akio SHIMA

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/51 ,  H01L27/092 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L29/08 ,  H01L21/04 ,  H01L21/311

CPC classification number: H01L29/7834 ,  H01L21/0465 ,  H01L21/0475 ,  H01L21/31116 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/1608 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66068 ,  H01L29/6659

Abstract: There is provided a semiconductor device that improves reliability. The impurity concentrations of a p|| source region and a p|| drain region are 5×1020 cm−3 or more. The channel-region-side end portion of a first insulating film is disposed on a p+ source region. The end portion has an inclined surface where the first insulating film thickness is reduced from the p− source region toward a channel region. The channel-region-side end portion of a second insulating film is disposed on a p+ drain region. The end portion has an inclined surface where the second insulating film thickness is reduced from the p+ drain region toward the channel region. A gate electrode is disposed on the channel region, the p+ source region, the p+ drain region, and the inclined surfaces of the first and the second insulating films through a gate insulating film including an aluminum oxide film.

公开(公告)号：US20250080071A1

公开(公告)日：2025-03-06

申请号：US18586892

申请日：2024-02-26

Applicant: Hitachi, Ltd.

Inventor： Ryo KUWANA ,  Masahiro MASUNAGA ,  Isao HARA

IPC: H03F3/45 ,  H03F1/26

Abstract: An amplification device includes: an amplification circuit in which a differential amplification unit to which a pair of input signals is input is constituted by a pair of transistors using SiC as a channel and which amplifies and outputs a difference in voltage between the pair of input signals; and a voltage control unit which controls voltages of respective signal input terminals to which the pair of input signals is input to be equal to or less than voltages of a positive power supply and a negative power supply supplied to the amplification circuit.

公开(公告)号：US20170141677A1

公开(公告)日：2017-05-18

申请号：US15420393

申请日：2017-01-31

Applicant: Hitachi, Ltd.

Inventor： Takayuki HASHIMOTO ,  Mutsuhiro MORI ,  Masahiro MASUNAGA

IPC: H02M1/088 ,  H01L29/10 ,  H02M7/5387 ,  H01L29/417 ,  H01L29/739 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08

CPC classification number: H02M1/088 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1079 ,  H01L29/41708 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/7394 ,  H01L29/7396 ,  H01L29/7397 ,  H02M1/08 ,  H02M7/003 ,  H02M7/537 ,  H02M7/5387 ,  H02M2001/0054

Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n−type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.

公开(公告)号：US20240080000A1

公开(公告)日：2024-03-07

申请号：US18119338

申请日：2023-03-09

Applicant: HITACHI, LTD.

Inventor： Masahiro MASUNAGA ,  Ryo KUWANA ,  Shinji NOMOTO ,  Isao HARA

IPC: H03F1/26 ,  G01L19/00 ,  G01L27/00

CPC classification number: H03F1/26 ,  G01L19/0092 ,  G01L27/005

Abstract: The measuring instrument includes a sensor unit that measures a predetermined physical quantity; an amplifier circuit that amplifies a signal output from the sensor unit; and a linear power supply that supplies power to the amplifier circuit, in which the amplifier circuit includes a first amplifier having a first transistor using a SiC semiconductor, the linear power supply includes a second amplifier having a second transistor using the SiC semiconductor, and noise characteristics of the first amplifier are superior to noise characteristics of the second amplifier.

公开(公告)号：US20190319103A1

公开(公告)日：2019-10-17

申请号：US16462319

申请日：2017-10-24

Applicant: HITACHI, LTD.

Inventor： Masahiro MASUNAGA ,  Shintaroh SATO ,  Akio SHIMA ,  Digh HISAMOTO

IPC: H01L29/16 ,  H01L27/092 ,  H01L29/10 ,  H01L29/08 ,  H01L29/36 ,  H01L27/02 ,  H01L29/417 ,  H01L23/498 ,  H01L23/00 ,  H01L21/02 ,  H01L21/82 ,  H01L29/66

Abstract: The purpose of the present invention is to provide a semiconductor device comprising an epitaxial layer formed on a SiC substrate, and a CMOS formed in the top part of the epitaxial layer, wherein growth of any defects present at the interface between the SiC substrate and the epitaxial layer is suppressed, and the reliability of the semiconductor device is improved. As a means to achieve the foregoing, a semiconductor device is formed such that the distance from a p-type diffusion layer to the interface between an n-type epitaxial layer and an n-type semiconductor substrate is larger than the thickness of a depletion layer that extends from the p-type diffusion layer to the back side of the n-type semiconductor substrate in response to the potential difference between a substrate electrode and another substrate electrode.