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    Flip-Chip Die Package Structure and Electronic Device
    11.
    发明申请
    Flip-Chip Die Package Structure and Electronic Device 有权

    公开(公告)号：US20210013154A1

    公开(公告)日：2021-01-14

    申请号：US17038756

    申请日：2020-09-30

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Wei Wu ,  Ding Li ,  Hongcheng Yin ,  Xiongcai Kuang

    IPC: H01L23/552 ,  H01L23/00

    Abstract: A flip-chip die package includes a substrate, a die, a plurality of conductive bumps, and a first metal structure, where an upper surface of the die is electrically coupled, using the conductive bumps, to a surface that is of the substrate and that faces the die, and the first metal structure includes a plurality of first metal rods disposed between the substrate and the die, where each first metal rod is electrically coupled to the substrate and the die, and the first metal rods are arranged around a first active functional circuit, and the first active functional circuit includes an electromagnetic radiation capability or an electromagnetic receiving capability in the die.

    Pop sound suppression method, audio output circuit, and terminal
    12.
    发明授权
    Pop sound suppression method, audio output circuit, and terminal 有权

    公开(公告)号：US10893360B2

    公开(公告)日：2021-01-12

    申请号：US16601133

    申请日：2019-10-14

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Ding Li ,  Shuai Du ,  Jun Li ,  Deyang Yin

    IPC: H04R3/02 ,  H03M1/66 ,  H04R5/033 ,  H04R5/04

    Abstract: A pop sound suppression method, an audio output circuit, and a terminal suppress a pop sound that is generated when an audio output circuit is in an alternating current (AC) coupling structure. The output circuit includes an output power amplifier, a common-mode voltage buffer, a reference voltage generation circuit, a powered-on pop sound suppression switch, and a common-mode switch. The powered-on pop sound suppression switch is configured to control, in a power-on process of the audio output circuit, a voltage level of an output node to be zero. The common-mode switch is configured to control, when a reference voltage level of the reference voltage generation circuit is zero, the voltage level of the output node to be equal to the reference level.

    Digital-to-analog conversion circuit
    13.
    发明授权
    Digital-to-analog conversion circuit 有权

    公开(公告)号：US10224947B2

    公开(公告)日：2019-03-05

    申请号：US15857651

    申请日：2017-12-29

    Applicant: HUAWEI TECHNOLOGIES CO., LTD.

    Inventor： Ding Li ,  Shuai Du ,  Hongpei Wang

    IPC: H03M1/00 ,  H03M1/06 ,  H03M1/40 ,  H03M1/78 ,  H03M1/74 ,  H03M1/10 ,  H03M1/66

    Abstract: Embodiments of the present invention provide a digital-to-analog conversion circuit, where the digital-to-analog conversion circuit includes a signal amplitude detector and a digital-to-analog converter. When the signal amplitude detector detects a low signal amplitude, a first current module in the digital-to-analog converter operates normally and a second current module in the digital-to-analog converter stops operating. In addition, when stopping operating, the second current module is in a state of a third bias voltage and a fourth bias voltage that are generated by a second bias circuit. When the amplitude detector detects a high signal amplitude subsequently, the second current module resumes normal operation. After operating normally, the second current module switches back to a first bias voltage and a second bias voltage that are generated by a first bias circuit. This reduces a nonlinearity problem caused before a second current module resumes normal operation.

    CIRCUIT DESIGN METHOD AND RELATED DEVICE
    14.
    发明公开
    CIRCUIT DESIGN METHOD AND RELATED DEVICE 审中-公开

    公开(公告)号：US20240135075A1

    公开(公告)日：2024-04-25

    申请号：US18395611

    申请日：2023-12-24

    Applicant: HUAWEI TECHNOLOGIES CO., LTD.

    Inventor： Ding Li ,  Yisheng Hu ,  Chongjun Ding ,  Shangxia Fang ,  Zhichao Li ,  Xianglong Meng

    IPC: G06F30/31

    CPC classification number: G06F30/31

    Abstract: A circuit design method includes: obtaining a first circuit diagram constructed based on a plurality of first components, where each first component includes a first parameter, and the first parameters are parameters that are used in a plurality of processes and that have normalized names; then obtaining indicators of electrical parameters of the plurality of first components based on the first circuit diagram; determining a plurality of second parameters based on the indicators of the electrical parameters of the plurality of first components, where the second parameters are in a one-to-one correspondence with the first parameters; then replacing the first parameters included in the first components with the second parameters, to obtain second components; and outputting a second circuit diagram constructed by the plurality of second components.

    Audio play circuit and audio play device
    16.
    发明授权
    Audio play circuit and audio play device 有权

    公开(公告)号：US11139784B2

    公开(公告)日：2021-10-05

    申请号：US16828425

    申请日：2020-03-24

    Applicant: HUAWEI TECHNOLOGIES CO., LTD.

    Inventor： Deyang Yin ,  Jun Li ,  Ding Li ,  Shuai Du

    IPC: H03F1/32 ,  H03F1/02

    Abstract: An example audio play circuit includes a power supply module, a power amplifier, a coupling capacitor, a load, and a plosive suppression circuit. An output terminal of the power amplifier is connected to a first terminal of the coupling capacitor and an output terminal of the plosive suppression circuit, a second terminal of the coupling capacitor is connected to the load, and an output terminal of the power supply module is connected to a power supply terminal of the power amplifier and a power supply terminal of the plosive suppression circuit. The power supply module is configured to provide a direct current power supply voltage for the power amplifier and the plosive suppression circuit. When the direct current power supply voltage rises to the first voltage threshold, the plosive suppression circuit connects the first terminal of the coupling capacitor to the ground terminal.

    Correction circuit and real-time clock circuit
    18.
    发明授权
    Correction circuit and real-time clock circuit 有权
    校正电路和实时时钟电路

    公开(公告)号：US09362920B2

    公开(公告)日：2016-06-07

    申请号：US14194291

    申请日：2014-02-28

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Jinxiu Liu ,  Shubao Guo ,  Ding Li

    IPC: G06F1/00 ,  G06F1/04 ,  G06F13/42 ,  H03K21/02 ,  G06F1/14 ,  H03L1/00 ,  G04G3/04 ,  G06F1/32

    CPC classification number: H03K21/02 ,  G04G3/04 ,  G06F1/14 ,  G06F1/32 ,  H03L1/00

    Abstract: The present invention provides a correction circuit. The correction circuit includes a frequency dividing circuit, a frequency dividing coefficient operation circuit, a built-in temperature collection circuit, and a power-on and power-off detection circuit. The built-in temperature collection circuit is configured to collect a temperature of the chip; the power-on and power-off detection circuit is configured to detect power-on and power-off of the chip; the frequency dividing coefficient operation circuit is configured to calculate, according to the temperature of the chip collected by the built-in temperature collection circuit when the power-on and power-off detection circuit detects that the chip is powered off, a frequency dividing coefficient, and output the frequency dividing coefficient to the frequency dividing circuit; and the frequency dividing circuit is configured to provide, according to the frequency dividing coefficient output by the frequency dividing coefficient operation circuit, a timing pulse for a real-time clock.

    Abstract translation: 本发明提供一种校正电路。 校正电路包括分频电路，分频系数运算电路，内置温度采集电路以及通电断电检测电路。 内置的温度采集电路被配置为收集芯片的温度; 上电断电检测电路被配置为检测芯片的上电和断电; 分频系数运算电路被配置为当上电和断电检测电路检测到芯片断电时根据由内置温度采集电路收集的芯片的温度来计算分频系数 并将分频系数输出到分频电路; 并且分频电路被配置为根据由分频系数运算电路输出的分频系数提供实时时钟的定时脉冲。

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