Oscillator circuit and method of generating a clock signal
    11.
    发明授权
    Oscillator circuit and method of generating a clock signal 有权
    振荡电路和产生时钟信号的方法

    公开(公告)号:US09507373B2

    公开(公告)日:2016-11-29

    申请号:US14899170

    申请日:2013-07-04

    CPC classification number: G06F1/08 H03K3/023 H03K3/0231

    Abstract: An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator.

    Abstract translation: 一种振荡器电路,包括用于产生时钟信号的触发器和用于将参考电压与在第一电容器的第一周期期间充电的第一电容器两端的电压进行比较的两个比较器,以及跨越第二电容器的电压 在时钟信号的第二周期期间被充电提供了用于消除任一比较器中任何偏移的影响的装置。 这是通过在输出频率的每个周期反转比较器的输入来实现的。 因此,将在一个周期上增加时钟周期的比较器中的偏移将使下一个周期的周期减少相同的量。 作为最终结果,无论比较器中有任何偏移漂移,两个时钟周期的时间段将保持不变。

    Semiconductor device and apparatus including semiconductor device
    12.
    发明授权
    Semiconductor device and apparatus including semiconductor device 有权
    包括半导体器件的半导体器件和设备

    公开(公告)号:US08749936B2

    公开(公告)日:2014-06-10

    申请号:US12745966

    申请日:2007-12-06

    CPC classification number: H03K19/00346 G06F21/755

    Abstract: A semiconductor device includes a substrate on which an electronic circuit is provided. One or more pads may be present which can connect the electronic circuit to an external device outside the substrate. A current meter is electrically in contact with at least a part of the substrate and/or the pad. The meter can measure a parameter forming a measure for an amount of a current flowing between the substrate and at least one of the at least one pad. A control unit is connected to the current meter and the electronic circuit, for controlling the electronic circuit based on the measured parameter.

    Abstract translation: 半导体器件包括其上设置电子电路的衬底。 可以存在可以将电子电路连接到衬底外部的外部设备的一个或多个焊盘。 电流表与衬底和/或衬垫的至少一部分电接触。 仪表可以测量形成在衬底和至少一个衬垫中的至少一个之间流动的电流量的测量的参数。 控制单元连接到电流表和电子电路,用于基于测量的参数来控制电子电路。

    ELECTRONIC DEVICE WITH PROTECTION CIRCUIT
    13.
    发明申请
    ELECTRONIC DEVICE WITH PROTECTION CIRCUIT 有权
    具有保护电路的电子设备

    公开(公告)号:US20120134060A1

    公开(公告)日:2012-05-31

    申请号:US13389179

    申请日:2009-08-06

    CPC classification number: H01L27/0285 H03K19/00315

    Abstract: An electronic device comprises an application circuit; a first supply rail having a first electric potential; a second supply rail having a second electric potential different from the first electric potential; at least one terminal having a third electric potential, connected to the application circuit; and a protection circuit for protecting the application circuit from an injected current. The protection circuit comprises a first conductive line connected between the at least one terminal and the first supply rail, the first conductive line comprising a first switch having a first control input; and a first voltage amplifier circuit having a first input connected to the at least one terminal, a second input connected to the second supply rail and a first output connected to the first control input.

    Abstract translation: 电子设备包括应用电路; 具有第一电位的第一供电轨; 具有不同于第一电位的第二电位的第二供电轨; 具有第三电位的至少一个端子,连接到所述应用电路; 以及用于保护施加电路免受注入电流的保护电路。 所述保护电路包括连接在所述至少一个端子和所述第一电源轨之间的第一导线,所述第一导线包括具有第一控制输入的第一开关; 以及第一电压放大器电路,其具有连接到所述至少一个端子的第一输入端,连接到所述第二电源轨道的第二输入端和连接到所述第一控制输入端的第一输出端。

    Circuit arrangement for filtering unwanted signals from a clock signal, processing system and method of filtering unwanted signals from a clock signal
    14.
    发明授权
    Circuit arrangement for filtering unwanted signals from a clock signal, processing system and method of filtering unwanted signals from a clock signal 有权
    用于从时钟信号滤波不想要的信号的电路装置,处理系统以及从时钟信号滤除不想要的信号的方法

    公开(公告)号:US08115516B2

    公开(公告)日:2012-02-14

    申请号:US12664028

    申请日:2007-06-14

    CPC classification number: H03K5/1252

    Abstract: A circuit arrangement for detecting unwanted signals on a clock signal comprises an input for receiving the clock signal, and a Phase Lock Loop PLL circuit having a reference input coupled to the input of the circuit arrangement for receiving the clock signal and an output for providing a PLL output signal. The circuit arrangement further comprises a detector coupled to the output of the PLL circuit and to the input of the circuit arrangement. The detector is arranged to identify correct transitions in the clock signal using the PLL output signal, and to remove incorrect transitions due to unwanted signals from the clock signal so as to provide a filtered clock signal at an output of the circuit arrangement.

    Abstract translation: 用于检测时钟信号上不想要的信号的电路装置包括用于接收时钟信号的输入端和锁相环PLL电路,其具有耦合到用于接收时钟信号的电路装置的输入端的参考输入端和用于提供时钟信号的输出端 PLL输出信号。 电路装置还包括耦合到PLL电路的输出和电路装置的输入的检测器。 检测器被布置为使用PLL输出信号来识别时钟信号中的正确转换,并且由于来自时钟信号的不期望的信号而去除不正确的转换,以便在电路装置的输出处提供经滤波的时钟信号。

    SEMICONDUCTOR DEVICE AND APPARATUS INCLUDING SEMICONDUCTOR DEVICE
    15.
    发明申请
    SEMICONDUCTOR DEVICE AND APPARATUS INCLUDING SEMICONDUCTOR DEVICE 有权
    半导体器件和包括半导体器件的器件

    公开(公告)号:US20100253422A1

    公开(公告)日:2010-10-07

    申请号:US12745973

    申请日:2008-11-27

    CPC classification number: H03K19/00346 G06F21/755

    Abstract: A semiconductor device includes a substrate on which an electronic circuit is provided. Two or more pads may be present which can connect the electronic circuit to an external device outside the substrate. A current meter is electrically in contact with at least a part of the substrate and/or the pad. The meter can measure a parameter forming a measure for an aggregate amount of a current flowing between the substrate and said pads. A control unit is connected to the current meter and the electronic circuit, for controlling the electronic circuit based on the measured parameter.

    Abstract translation: 半导体器件包括其上设置电子电路的衬底。 可以存在可以将电子电路连接到衬底外部的外部设备的两个或更多个焊盘。 电流表与衬底和/或衬垫的至少一部分电接触。 仪表可以测量形成在基板和所述焊盘之间流动的电流的总量的度量的参数。 控制单元连接到电流表和电子电路,用于基于测量的参数来控制电子电路。

    System and method for clock signal generation
    16.
    发明授权
    System and method for clock signal generation 有权
    用于产生时钟信号的系统和方法

    公开(公告)号:US09124277B2

    公开(公告)日:2015-09-01

    申请号:US14111775

    申请日:2011-04-20

    Applicant: Hubert Bode

    Inventor: Hubert Bode

    CPC classification number: H03L7/08 H03L7/183 H03L7/1974

    Abstract: A clock signal generation system is provided that includes a clock signal generating circuit arranged to provide a first clock signal having a selectable first clock rate; a divider circuit connected to receive the first clock signal and arranged to generate, depending on a division factor, a second clock signal from the first clock signal, having a constant second clock rate and being synchronized with the first clock signal; and a controller module connected to the divider circuit and arranged to change the division factor when a different first clock rate is selected, to keep the second clock rate constant and the second clock signal synchronized with the first clock signal.

    Abstract translation: 提供了一种时钟信号发生系统,其包括时钟信号发生电路,其被布置为提供具有可选择的第一时钟速率的第一时钟信号; 分频器电路,被连接以接收第一时钟信号,并且被布置为根据分频因子产生具有恒定的第二时钟速率并与第一时钟信号同步的来自第一时钟信号的第二时钟信号; 以及控制器模块,连接到分频器电路,并且被布置为当选择不同的第一时钟速率时改变分频因子,以保持第二时钟速率恒定,并且第二时钟信号与第一时钟信号同步。

    OSCILLATOR CIRCUIT, A SEMICONDUCTOR DEVICE AND AN APPARATUS
    17.
    发明申请
    OSCILLATOR CIRCUIT, A SEMICONDUCTOR DEVICE AND AN APPARATUS 有权
    振荡器电路,半导体器件和器件

    公开(公告)号:US20150061780A1

    公开(公告)日:2015-03-05

    申请号:US14395522

    申请日:2012-04-20

    CPC classification number: H03L7/06 H03K3/0231 H03K4/50

    Abstract: An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase. The second comparator comprises a second chopper-stabilized comparator switchable between a respective compare phase and a respective zeroing phase in dependence on the output clock signal and arranged to operate in its compare phase in the second half-phase to obtain a second comparator output from comparing the second capacitor voltage to the reference voltage and in its zeroing phase in the first half-phase.

    Abstract translation: 描述用于提供输出时钟信号的振荡器电路。 所述振荡器电路包括电压基准,第一电流源,第一电容器,第一电容器开关,第二电流源,第二电容器,第二电容器开关,第一比较器,第二比较器和触发器。 第一比较器包括第一斩波稳定比较器,其可以根据输出时钟信号在比较相位和归零相位之间切换,并被布置为在输出时钟信号的第一半相位中的比较相位中工作,以提供第一比较器 将第一电容器电压与参考电压进行比较,并在第二半相的归零阶段输出。 第二比较器包括第二斩波稳定比较器,其可以根据输出时钟信号在相应的比较相位和相应的归零相位之间切换,并被布置成在第二半相的其比较相位中工作以从比较获得第二比较器输出 第二电容器电压为参考电压,并且在第一半相中处于其归零阶段。

    SIGNALLING CIRCUIT, PROCESSING DEVICE AND SAFETY CRITICAL SYSTEM
    18.
    发明申请
    SIGNALLING CIRCUIT, PROCESSING DEVICE AND SAFETY CRITICAL SYSTEM 有权
    信号电路,处理装置和安全关键系统

    公开(公告)号:US20140169495A1

    公开(公告)日:2014-06-19

    申请号:US14232479

    申请日:2011-08-01

    CPC classification number: H04L25/02 H03K19/00361 H03K19/017509

    Abstract: A signalling circuit for a signal channel of a communication network comprises a communication network terminal connectable to the signal channel and to a voltage supply; an input terminal connectable to receive a transmit signal; a driver device comprising a first driver terminal connected to the communication network terminal, a second driver terminal connected to ground, and a driver control terminal connected to the input terminal; wherein the driver device is arranged to connect the communication network terminal to ground in response to a transition from a low to a high voltage driver control signal state of a driver control signal received at the driver control terminal. And the signalling circuit comprises a feedback circuit connected to the first driver terminal and the driver control terminal and comprising a capacitive device; and a pull-down device arranged to connect the driver control terminal to ground after a predefined delay after a transition of the transmit signal from a low to a high voltage transmit signal state.

    Abstract translation: 用于通信网络的信号信道的信令电路包括可连接到信号信道和电压源的通信网络终端; 可接收发送信号的输入端子; 驱动器装置,包括连接到通信网络终端的第一驱动器端子,连接到地的第二驱动器端子和连接到输入端子的驱动器控制端子; 其中所述驱动器装置被布置成响应于从所述驾驶员控制终端处接收到的驾驶员控制信号的低电压到高电压驱动器控制信号状态的转变而将所述通信网络终端连接到地。 并且信令电路包括连接到第一驱动器端子和驱动器控制端子并包括电容性装置的反馈电路; 以及下拉装置,其被布置成在所述发射信号从低电压到高电压发射信号状态的转变之后在预定义的延迟之后将所述驱动器控制端子接地。

    SYSTEM AND METHOD FOR CLOCK SIGNAL GENERATION
    19.
    发明申请
    SYSTEM AND METHOD FOR CLOCK SIGNAL GENERATION 有权
    用于时钟信号发生的系统和方法

    公开(公告)号:US20140035638A1

    公开(公告)日:2014-02-06

    申请号:US14111775

    申请日:2011-04-20

    Applicant: Hubert Bode

    Inventor: Hubert Bode

    CPC classification number: H03L7/08 H03L7/183 H03L7/1974

    Abstract: A clock signal generation system is provided that includes a clock signal generating circuit arranged to provide a first clock signal having a selectable first clock rate; a divider circuit connected to receive the first clock signal and arranged to generate, depending on a division factor, a second clock signal from the first clock signal, having a constant second clock rate and being synchronized with the first clock signal; and a controller module connected to the divider circuit and arranged to change the division factor when a different first clock rate is selected, to keep the second clock rate constant and the second clock signal synchronized with the first clock signal.

    Abstract translation: 提供了一种时钟信号发生系统,其包括时钟信号发生电路,其被布置为提供具有可选择的第一时钟速率的第一时钟信号; 分频器电路,被连接以接收第一时钟信号,并且被布置为根据分频因子产生具有恒定的第二时钟速率并与第一时钟信号同步的来自第一时钟信号的第二时钟信号; 以及控制器模块,连接到分频器电路,并且被布置为当选择不同的第一时钟速率时改变分频因子,以保持第二时钟速率恒定,并且第二时钟信号与第一时钟信号同步。

    Electronic device with protection circuit
    20.
    发明授权
    Electronic device with protection circuit 有权
    电子设备带保护电路

    公开(公告)号:US08605398B2

    公开(公告)日:2013-12-10

    申请号:US13389179

    申请日:2009-08-06

    CPC classification number: H01L27/0285 H03K19/00315

    Abstract: An electronic device comprises an application circuit; a first supply rail having a first electric potential; a second supply rail having a second electric potential different from the first electric potential; at least one terminal having a third electric potential, connected to the application circuit; and a protection circuit for protecting the application circuit from an injected current. The protection circuit comprises a first conductive line connected between the at least one terminal and the first supply rail, the first conductive line comprising a first switch having a first control input; and a first voltage amplifier circuit having a first input connected to the at least one terminal, a second input connected to the second supply rail and a first output connected to the first control input.

    Abstract translation: 电子设备包括应用电路; 具有第一电位的第一供电轨; 具有不同于第一电位的第二电位的第二供电轨; 具有第三电位的至少一个端子,连接到所述应用电路; 以及用于保护施加电路免受注入电流的保护电路。 所述保护电路包括连接在所述至少一个端子和所述第一电源轨之间的第一导线,所述第一导线包括具有第一控制输入的第一开关; 以及第一电压放大器电路,其具有连接到所述至少一个端子的第一输入端,连接到所述第二电源轨道的第二输入端和连接到所述第一控制输入端的第一输出端。

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