Printed wiring board
    12.
    发明授权

    公开(公告)号:US10405426B2

    公开(公告)日:2019-09-03

    申请号:US16169340

    申请日:2018-10-24

    申请人: IBIDEN CO., LTD.

    摘要: A printed wiring board includes: a core substrate having a core layer, first and second conductor layers, and through-hole conductors penetrating through the core layer and connecting the conductor layers; and first and second build-up layers each including an insulating layer, an inner side conductor layer, an outermost insulating layer, an outermost conductor layer, and a solder resist layer. Each of the conductor layers includes conductor circuits having substantially a trapezoid cross-sectional shape, and spaces between adjacent conductor circuits, and includes a metal foil, a seed layer, and an electrolytic plating film. The inner side conductor layers have the smallest minimum circuit width, the smallest minimum space width and the largest base angle among the conductor layers. The insulating layers have the smallest ten-point average roughness rz3, rz7 among the ten-point average roughness rz3, rz7, rz1, rz2, rz5 and rz9 of the core layer, insulating layers and outermost insulating layers.

    Printed wiring board
    13.
    发明授权

    公开(公告)号:US10375828B2

    公开(公告)日:2019-08-06

    申请号:US16166392

    申请日:2018-10-22

    申请人: IBIDEN CO., LTD.

    IPC分类号: H05K1/11 H05K1/16 H05K1/02

    摘要: A printed wiring board includes: a core substrate having a core layer and first and second conductor layers; a first build-up layer including a first insulating layer, an inner first conductor layer, an outermost first insulating layer, and an outermost first conductor layer; and a second build-up layer including a second insulating layer, an inner second conductor layer, an outermost second insulating layer, and an outermost second conductor layer. Each conductor layer includes metal foil, seed layer, and electrolytic plating film, t1/T1, t2/T2, u1/U1 and u2/U2 are smaller than 1, and s1/S1 and s2/S2 are larger than 1, where t1, t2, u1, u2, s1 and s2 are electrolytic plating film thicknesses of the first and second and outermost and inner first and second conductor layers, T1, T2, U1, U2, S1 and S2 are metal foil thicknesses of the first and second and outermost and inner first and second conductor layers.

    Printed wiring board
    14.
    发明授权

    公开(公告)号:US10314168B2

    公开(公告)日:2019-06-04

    申请号:US16167850

    申请日:2018-10-23

    申请人: IBIDEN CO., LTD.

    摘要: A printed wiring board includes a core substrate and first and second build-up layers. The substrate includes a core layer, through-hole conductors formed in through holes such that each through hole has first opening tapering from first toward second surface of the core layer, and second opening tapering from second toward first surface of the core layer, and first and second through-hole lands directly connected to the through-hole conductors. Each build-up layer includes an insulating layer, via conductors, via lands, an outermost insulating layer, an outermost conductor layer, and outermost via conductors. Each of the through-hole lands, via lands and outermost conductor layers includes a metal foil, a seed layer and an electrolytic plating film. The foils have mat surfaces such that the mat surfaces of the via lands has ten-point average roughness smaller than ten-point average roughness of the mat surfaces of the through-hole lands and outermost conductor layers.

    Printed wiring board
    15.
    发明授权

    公开(公告)号:US10368440B2

    公开(公告)日:2019-07-30

    申请号:US16165743

    申请日:2018-10-19

    申请人: IBIDEN CO., LTD.

    摘要: A printed wiring board includes: a core substrate having a core layer, conductor layers on the core layer, and through-hole conductors; a first build-up layer including an insulating layer on the substrate, an inner side conductor layer on the insulating layer, an outermost insulating layer on the inner side conductor layer, and an outermost conductor layer on the outermost insulating layer; and a second build-up layer including an insulating layer on the substrate, an inner side conductor layer on the insulating layer, an outermost insulating layer on the inner side conductor layer, and an outermost conductor layer on the outermost insulating layer. Each of the conductor layers, inner side conductor layers, and outermost conductor layers has a metal foil, a seed layer and an electrolytic plating film, and that each inner side conductor layer has the smallest thickness among the conductor layers, inner side conductor layers and outermost conductor layers.

    Shield cap and method for manufacturing the same

    公开(公告)号:US10271468B2

    公开(公告)日:2019-04-23

    申请号:US15782349

    申请日:2017-10-12

    申请人: IBIDEN CO., LTD.

    摘要: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The side wall and ceiling portions are forming accommodation space to accommodate electronic component, the ceiling portion has a first surface facing the space and a second surface on the opposite side, the side wall portion has a third surface facing the ceiling portion, a fourth surface on the opposite side, a fifth surface facing the space, and a sixth surface on the opposite side, and the side wall portion is formed such that the sixth surface has a first inclined portion increasing distance to the space from the third toward fourth surfaces and a second inclined portion increasing distance to the space from the fourth toward third surfaces.

    Printed wiring board for mounting electronic component

    公开(公告)号:US10231336B2

    公开(公告)日:2019-03-12

    申请号:US15920594

    申请日:2018-03-14

    申请人: IBIDEN CO., LTD.

    摘要: A printed wiring board includes a first conductor layer forming an inner conductor layer, a second conductor layer forming a first outemiost conductor layer, a third conductor layer forming a second outermost conductor layer, insulating layers including first and second insulating layers, first via conductors connecting the first and second conductor layers, and second via conductors connecting the first and third conductor layers. The first conductor layer has thickness greater than thicknesses of the second and third conductor layers, the second conductor layer includes component mounting pads positioned to mount an electronic component on the second conductor layer and extending outside component mounting region corresponding to projection region of the component, and the first via conductors include a first set of the first via conductors formed directly underneath the component mounting region and a second set of the first via conductors formed on outer side of the component mounting region.