公开(公告)号：US20170077045A1

公开(公告)日：2017-03-16

申请号：US15364185

申请日：2016-11-29

Applicant: IBIS Innotech Inc.

Inventor： Wen-Chun Liu ,  Wei-Jen Lai

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/35121 ,  H05K1/0373 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0014 ,  H05K3/105 ,  H05K3/188 ,  H05K3/4007 ,  H05K3/4697 ,  H05K2201/0236 ,  H05K2201/0376 ,  H05K2201/09063 ,  H05K2201/09118 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/10151 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2924/00014

Abstract: A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.

Abstract translation: 半导体结构包括绝缘层，多个阶梯形导电通孔和图案化电路层。 绝缘层包括顶表面和与顶表面相对的底表面。 阶梯状导电通孔设置在绝缘层处以电连接顶表面和底表面。 每个阶梯式导电通孔包括头部和连接到头部的颈部。 头部设置在顶表面上，头部的上表面与顶表面共面。 头部的最小直径大于颈部的最大直径。 图案化电路层设置在顶表面上并电连接到阶梯式导电通孔。