公开(公告)号：US20130168798A1

公开(公告)日：2013-07-04

申请号：US13727599

申请日：2012-12-27

Applicant: Industrial Technology Research Institute

Inventor： Jing-Yao Chang ,  Tao-Chih Chang ,  Yu-Wei Huang ,  Yu-Min Lin ,  Shin-Yi Huang

IPC: H01L25/16

CPC classification number: H01L25/16 ,  H01L23/3121 ,  H01L23/38 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A first back surface of a first chip faces toward a carrier. A first active surface of the first chip has first pads and a first insulting layer thereon. A second chip is disposed on the first chip and electrically connected to the carrier. A second active surface of the second chip faces toward the first active surface. The second active surface has second pads and a second insulting layer thereon. Bumps connect the first and second pads. First and second daisy chain circuits are respectively disposed on the first and second insulting layers. Hetero thermoelectric device pairs are disposed between the first and second chips and connected in series by the first and second daisy chain circuits, and constitute a circuit with an external device. First and second heat sinks are respectively disposed on a second surface of the carrier and a second back surface of the second chip.

Abstract translation: 第一芯片的第一后表面朝向载体。 第一芯片的第一有源表面具有第一焊盘和其上的第一绝缘层。 第二芯片设置在第一芯片上并电连接到载体。 第二芯片的第二有源表面朝向第一有源表面。 第二活性表面在其上具有第二垫和第二绝缘层。 碰撞连接第一和第二垫。 第一和第二菊花链电路分别设置在第一和第二绝缘层上。 异质热电元件对设置在第一和第二芯片之间并且由第一和第二菊花链电路串联连接，并且构成具有外部装置的电路。 第一和第二散热器分别设置在载体的第二表面和第二芯片的第二后表面上。

公开(公告)号：US20180145236A1

公开(公告)日：2018-05-24

申请号：US15857628

申请日：2017-12-29

Applicant: Industrial Technology Research Institute

Inventor： Yu-Wei Huang ,  Tao-Chih Chang ,  Chih-Ming Shen

IPC: H01L33/62 ,  H01L25/075 ,  H01L21/56 ,  H01L33/58

CPC classification number: H01L33/62 ,  H01L21/568 ,  H01L25/0753 ,  H01L25/0756 ,  H01L33/58 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/18 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/18162 ,  H01L2924/00

Abstract: A package structure for a light emitting device including a carrier, a plurality of package units, an interconnection structure is provided. The carrier has a carrying surface, the package units stack on the carrying surface, each of the package units has a first surface and a second surface opposite the first surface and a plurality of light emitting devices arranged in an array and embedded in the package unit. Each of the light emitting devices includes a top portion facing the carrier, a bottom portion opposite to the top portion and a first electrode on the top portion, the bottom portion of each of the plurality of light emitting devices is coplanar with the first surface of the package unit. The interconnection structure is located in the package units and includes a plurality of conductive vias passing through the corresponding package units and electrically connected between the corresponding first electrodes.

公开(公告)号：US20180035550A1

公开(公告)日：2018-02-01

申请号：US15222958

申请日：2016-07-29

Applicant: Industrial Technology Research Institute

Inventor： Chin-Hung Wang ,  Yu-Wei Huang

IPC: H05K3/46 ,  H05K13/00

Abstract: An apparatus for assembling devices, comprising a plurality of actuated devices disposed on a substrate, each of the actuated devices comprising a first electrode disposed on and electrically connect to the substrate, a connecting pad disposed on the substrate, an electro-active polymer layer comprising a first surface disposed on the connecting pad and a second surface, and a second electrode disposed on the second surface of the electro-active polymer layer and electrically connected to the substrate.

公开(公告)号：US08866309B2

公开(公告)日：2014-10-21

申请号：US13727599

申请日：2012-12-27

Applicant: Industrial Technology Research Institute

Inventor： Jing-Yao Chang ,  Tao-Chih Chang ,  Yu-Wei Huang ,  Yu-Min Lin ,  Shin-Yi Huang

IPC: H01L23/48 ,  H01L29/40

CPC classification number: H01L25/16 ,  H01L23/3121 ,  H01L23/38 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A first back surface of a first chip faces toward a carrier. A first active surface of the first chip has first pads and a first insulting layer thereon. A second chip is disposed on the first chip and electrically connected to the carrier. A second active surface of the second chip faces toward the first active surface. The second active surface has second pads and a second insulting layer thereon. Bumps connect the first and second pads. First and second daisy chain circuits are respectively disposed on the first and second insulting layers. Hetero thermoelectric device pairs are disposed between the first and second chips and connected in series by the first and second daisy chain circuits, and constitute a circuit with an external device. First and second heat sinks are respectively disposed on a second surface of the carrier and a second back surface of the second chip.

Abstract translation: 第一芯片的第一后表面朝向载体。 第一芯片的第一有源表面具有第一焊盘和其上的第一绝缘层。 第二芯片设置在第一芯片上并电连接到载体。 第二芯片的第二有源表面朝向第一有源表面。 第二活性表面在其上具有第二垫和第二绝缘层。 碰撞连接第一和第二垫。 第一和第二菊花链电路分别设置在第一和第二绝缘层上。 异质热电元件对设置在第一和第二芯片之间并且由第一和第二菊花链电路串联连接，并且构成具有外部装置的电路。 第一和第二散热器分别设置在载体的第二表面和第二芯片的第二后表面上。

公开(公告)号：US11239141B2

公开(公告)日：2022-02-01

申请号：US17031486

申请日：2020-09-24

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Ren-Shin Cheng ,  Shih-Hsien Wu ,  Yu-Wei Huang ,  Chih Ming Shen ,  Yi-Chieh Tsai

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/28 ,  H01L21/00 ,  H01L21/44 ,  H05K5/02 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31

Abstract: A lead frame package including first conductive layer, first electronic component, lead frames, second conductive layer and package body. First conductive layer has conductive carriers. First electronic component has first pins. Lead frames and first pins are respectively electrically connected to conductive carriers. Second conductive layer has conductive joints respectively electrically connected to lead frames so as to be electrically connected to at least a part of conductive carriers via lead frames. Package body encapsulates first conductive layer, first electronic component, and lead frames. First conductive layer and second conductive layer are located on two opposite sides of first electronic component, respectively.

公开(公告)号：US10037980B2

公开(公告)日：2018-07-31

申请号：US15632392

申请日：2017-06-26

Applicant: Industrial Technology Research Institute

Inventor： Yu-Wei Huang ,  Tao-Chih Chang ,  Chih-Ming Shen

IPC: H01L25/075 ,  H01L21/68 ,  H01L21/683 ,  H01L33/62 ,  H01L33/48 ,  H01L21/48 ,  H01L33/00

CPC classification number: H01L25/0753 ,  H01L21/4853 ,  H01L21/68 ,  H01L21/6835 ,  H01L24/00 ,  H01L33/0079 ,  H01L33/483 ,  H01L33/62 ,  H01L2221/68363 ,  H01L2933/0066

Abstract: A fabricating method of a semiconductor light emitting device includes disposing a plurality of non-conductive walls on a substrate. An alignment position is formed between every two adjacent non-conductive walls. A plurality of semiconductor light emitting units on a first carrier board are respectively aligned to the alignment positions. The semiconductor light emitting units are divided into a plurality of groups. The semiconductor light emitting units in one of the groups are dissociated from the first carrier board. Thus, the semiconductor light emitting units in the group fall into the corresponding alignment positions due to gravity. Each of the semiconductor light emitting units is electrically connected with the substrate through a first electrode. A conductive layer is formed on the semiconductor light emitting units. Accordingly, the semiconductor light emitting units are electrically connected together to the conductive layer through second electrodes.

公开(公告)号：US09647029B2

公开(公告)日：2017-05-09

申请号：US14979533

申请日：2015-12-28

Applicant: Industrial Technology Research Institute

Inventor： Wei-Chung Lo ,  Yu-Wei Huang ,  Tao-Chih Chang ,  Chih-Ming Shen

IPC: H01L21/00 ,  H01L27/15 ,  H01L33/38 ,  H01L33/00 ,  H01L33/62

CPC classification number: H01L27/156 ,  H01L25/0753 ,  H01L33/005 ,  H01L33/38 ,  H01L33/62 ,  H01L2224/48139 ,  H01L2933/0016 ,  H01L2933/0066

Abstract: In an embodiment, a light emitting device comprises a light emitting diode chip and a spherical extending electrode. The light emitting diode chip includes a semiconductor epitaxial structure, a first electrode and a second electrode. The first electrode and the second electrode are disposed on two opposite sides of the semiconductor epitaxial structure, respectively. The first electrode is disposed between the semiconductor epitaxial structure and the spherical extending electrode, and the spherical extending electrode is electrically connected to the semiconductor epitaxial structure electrically through the first electrode. The volume of the spherical extending electrode is greater than that of the light emitting diode chip.