公开(公告)号：US20210351116A1

公开(公告)日：2021-11-11

申请号：US17379724

申请日：2021-07-19

Applicant: Intel Corporation

Inventor： Sanka Ganesan ,  William James Lambert ,  Zhichao Zhang ,  Sri Chaitra Jyotsna Chavali ,  Stephen Andrew Smith ,  Michael James Hill ,  Zhenguo Jiang

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H05K1/18 ,  H01L23/00 ,  H01L25/10 ,  H01L25/065 ,  H05K7/02 ,  H01L21/56

Abstract: Disclosed herein are integrated circuit (IC) structures that may be included in package substrates. For example, disclosed herein are passive components in package substrate, wherein the passive components include at least one non-circular via and at least one pad in contact with the at least one non-circular via, and the passive components include an inductor or a capacitor. Other embodiments are also disclosed.

公开(公告)号：US20200253040A1

公开(公告)日：2020-08-06

申请号：US16268318

申请日：2019-02-05

Applicant: Intel Corporation

Inventor： Sidharth Dalmia ,  Zhenguo Jiang ,  William James Lambert ,  Kirthika Nahalingam ,  Swathi Vijayakumar

IPC: H05K1/02 ,  H05K1/18 ,  G06F1/16 ,  H01Q1/22 ,  H01Q1/48 ,  H01Q1/50

Abstract: Disclosed herein are radio frequency (RF) front-end structures, as well as related methods and devices. In some embodiments, an RF front-end package may include an RF package substrate including an embedded passive circuit element. At least a portion of the embedded passive circuit element may be included in a metal layer of the RF package substrate. The RF package substrate may also include a ground plane in the metal layer.

公开(公告)号：US20250071885A1

公开(公告)日：2025-02-27

申请号：US18944243

申请日：2024-11-12

Applicant: Intel Corporation

Inventor： Sidharth Dalmia ,  Zhenguo Jiang ,  William J. Lambert ,  Kirthika Nahalingam ,  Swathi Vijayakumar

IPC: H05K1/02 ,  G06F1/16 ,  H01F5/04 ,  H01L25/16 ,  H04B1/40 ,  H05K1/18

Abstract: Disclosed herein are radio frequency (RF) front-end structures, as well as related methods and devices. In some embodiments, an RF front-end package may include an RF package substrate including an embedded passive circuit element. At least a portion of the embedded passive circuit element may be included in a metal layer of the RF package substrate. The RF package substrate may also include a ground plane in the metal layer.

公开(公告)号：US12200855B2

公开(公告)日：2025-01-14

申请号：US18418513

申请日：2024-01-22

Applicant: Intel Corporation

Inventor： Sidharth Dalmia ,  Zhenguo Jiang ,  William J. Lambert ,  Kirthika Nahalingam ,  Swathi Vijayakumar

IPC: H05K1/02 ,  G06F1/16 ,  H01F5/04 ,  H01L25/16 ,  H04B1/40 ,  H05K1/18

Abstract: Disclosed herein are radio frequency (RF) front-end structures, as well as related methods and devices. In some embodiments, an RF front-end package may include an RF package substrate including an embedded passive circuit element. At least a portion of the embedded passive circuit element may be included in a metal layer of the RF package substrate. The RF package substrate may also include a ground plane in the metal layer.

公开(公告)号：US12003023B2

公开(公告)日：2024-06-04

申请号：US16258573

申请日：2019-01-26

Applicant: INTEL CORPORATION

Inventor： Zhenguo Jiang ,  Omkar Karhade ,  Srichaitra Chavali ,  Zhichao Zhang ,  Jimin Yao ,  Stephen Smith ,  Xiaoqian Li ,  Robert Sankman

IPC: H01Q1/22 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/38

CPC classification number: H01Q1/38 ,  H01L21/56 ,  H01L24/26 ,  H01Q1/2283 ,  H05K2201/10098

Abstract: An RF chip package comprises a housing and one or more conductive contacts designed to electrically connect the RF chip package to other conductive contacts. The housing includes a first substrate, a 3-D antenna on the first substrate, and a second substrate. The second substrate includes a plurality of semiconductor devices and is bonded to the first substrate. An interconnect structure allows for electrical connection between the first and second substrates. In some cases, the first substrate is flip-chip bonded to the second substrate or is otherwise connected to the second substrate by an array of solder balls. By integrating both the 3-D antenna and RF circuitry together in the same chip package, costs are minimized while bandwidth is greatly improved compared to a separately machined 3-D antenna.

公开(公告)号：US20240164010A1

公开(公告)日：2024-05-16

申请号：US18418513

申请日：2024-01-22

Applicant: Intel Corporation

Inventor： Sidharth Dalmia ,  Zhenguo Jiang ,  William J. Lambert ,  Kirthika Nahalingam ,  Swathi Vijayakumar

IPC: H05K1/02 ,  G06F1/16 ,  H01F5/04 ,  H05K1/18

CPC classification number: H05K1/0243 ,  G06F1/1613 ,  H01F5/04 ,  H05K1/028 ,  H05K1/181 ,  H05K1/189 ,  H04B1/40

Abstract: Disclosed herein are radio frequency (RF) front-end structures, as well as related methods and devices. In some embodiments, an RF front-end package may include an RF package substrate including an embedded passive circuit element. At least a portion of the embedded passive circuit element may be included in a metal layer of the RF package substrate. The RF package substrate may also include a ground plane in the metal layer.

公开(公告)号：US11804426B2

公开(公告)日：2023-10-31

申请号：US17379724

申请日：2021-07-19

Applicant: Intel Corporation

Inventor： Sanka Ganesan ,  William James Lambert ,  Zhichao Zhang ,  Sri Chaitra Jyotsna Chavali ,  Stephen Andrew Smith ,  Michael James Hill ,  Zhenguo Jiang

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H05K1/18 ,  H01L23/00 ,  H01L25/10 ,  H01L25/065 ,  H05K7/02 ,  H01L21/56

CPC classification number: H01L23/49816 ,  H01L21/4832 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H05K1/181 ,  H05K7/023

Abstract: Disclosed herein are integrated circuit (IC) structures that may be included in package substrates. For example, disclosed herein are passive components in package substrate, wherein the passive components include at least one non-circular via and at least one pad in contact with the at least one non-circular via, and the passive components include an inductor or a capacitor. Other embodiments are also disclosed.

公开(公告)号：US11611164B2

公开(公告)日：2023-03-21

申请号：US16454439

申请日：2019-06-27

Applicant: Intel Corporation

Inventor： Zhenguo Jiang ,  Omkar Karhade ,  Sri Chaitra Chavali ,  William Lambert ,  Zhichao Zhang ,  Mitul Modi

IPC: H01R12/72 ,  H01R12/77 ,  H01R13/40 ,  H01R13/24 ,  H01R13/6471 ,  H01R107/00

Abstract: A wide bandwidth signal connector plug, comprising a plurality of signal pins having a first anchor portion and a first mating portion, and a plurality of ground pins having a second anchor portion and a second mating portion. The plurality of ground pins is adjacent to the plurality of signal pins. The plurality of signal pins has a first thickness and the plurality of ground pins has a second thickness that is greater than the first thickness. The first anchor portion has a first width and the second anchor portion has a second width that is greater than the first width.