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    In-cell differential read-out circuitry for reading signed weight values in resistive processing unit architecture
    12.
    发明授权
    In-cell differential read-out circuitry for reading signed weight values in resistive processing unit architecture 有权

    公开(公告)号：US10468098B2

    公开(公告)日：2019-11-05

    申请号：US16353111

    申请日：2019-03-14

    Applicant: International Business Machines Corporation

    Inventor： Seyoung Kim ,  Hyung-Min Lee ,  Tayfun Gokmen ,  Shu-Jen Han

    IPC: G11C13/00 ,  G06N3/063 ,  G06N3/08

    Abstract: A resistive processing unit (RPU) device includes a weight storage device to store a weight voltage which corresponds to a weight value of the RPU device, and a read transistor having a gate connected to the weight storage device, and first and second source/drain terminals connected to first and second control ports, respectively. A current source connected to the second source/drain terminal generates a fixed reference current. The read transistor generates a weight current in response to the weight voltage. A read current output from the second control port represents a signed weight value of the RPU device. A magnitude of the read current is equal to a difference between the weight current and the fixed reference current. The sign of the read current is positive when the weight current is greater than the fixed reference current, and negative when the weight current is less than the fixed reference current.

    SELF-ASSEMBLY OF NANOSTRUCTURES
    13.
    发明申请
    SELF-ASSEMBLY OF NANOSTRUCTURES 审中-公开

    公开(公告)号：US20190319191A1

    公开(公告)日：2019-10-17

    申请号：US15952570

    申请日：2018-04-13

    Applicant: International Business Machines Corporation

    Inventor： Shu-Jen Han

    IPC: H01L51/00 ,  C01B32/168

    Abstract: Sub-lithographic structures configured for selective placement of carbon nanotubes and methods of fabricating the same generally includes alternating conformal first and second layers provided on a topographical pattern formed in a dielectric layer. The conformal layers can be deposited by atomic layer deposition or chemical vapor deposition at thicknesses less than 5 nanometers. A planarized surface of the alternating conformal first and second layers provides an alternating pattern of exposed surfaces corresponding to the first and second layer, wherein a width of at least a portion of the exposed surfaces is substantially equal to the thickness of the corresponding first and second layers. The first layer is configured to provide an affinity for carbon nanotubes and the second layer does not have an affinity such that the carbon nanotubes can be selectively placed onto the exposed surfaces of the alternating pattern corresponding to the first layer.

    IN-CELL DIFFERENTIAL READ-OUT CIRCUITRY FOR READING SIGNED WEIGHT VALUES IN RESISTIVE PROCESSING UNIT ARCHITECTURE
    14.
    发明申请
    IN-CELL DIFFERENTIAL READ-OUT CIRCUITRY FOR READING SIGNED WEIGHT VALUES IN RESISTIVE PROCESSING UNIT ARCHITECTURE 审中-公开

    公开(公告)号：US20190304539A1

    公开(公告)日：2019-10-03

    申请号：US16353111

    申请日：2019-03-14

    Applicant: International Business Machines Corporation

    Inventor： Seyoung Kim ,  Hyung-Min Lee ,  Tayfun Gokmen ,  Shu-Jen Han

    IPC: G11C13/00 ,  G06N3/08 ,  G06N3/063

    Abstract: A resistive processing unit (RPU) device includes a weight storage device to store a weight voltage which corresponds to a weight value of the RPU device, and a read transistor having a gate connected to the weight storage device, and first and second source/drain terminals connected to first and second control ports, respectively. A current source connected to the second source/drain terminal generates a fixed reference current. The read transistor generates a weight current in response to the weight voltage. A read current output from the second control port represents a signed weight value of the RPU device. A magnitude of the read current is equal to a difference between the weight current and the fixed reference current. The sign of the read current is positive when the weight current is greater than the fixed reference current, and negative when the weight current is less than the fixed reference current.

    Plasmonic Non-Dispersive Infrared Gas Sensors
    15.
    发明申请
    Plasmonic Non-Dispersive Infrared Gas Sensors 审中-公开

    公开(公告)号：US20190277761A1

    公开(公告)日：2019-09-12

    申请号：US15918638

    申请日：2018-03-12

    Applicant: International Business Machines Corporation

    Inventor： Abram L. Falk ,  Damon B. Farmer ,  Shu-Jen Han

    IPC: G01N21/552 ,  G01N21/3504

    Abstract: Differential, plasmonic, non-dispersive infrared gas sensors are provided. In one aspect, a gas sensor includes: a plasmonic resonance detector including a differential plasmon resonator array that is resonant at different wavelengths of light; and a light source incident on the plasmonic resonance detector. The differential plasmon resonator array can include: at least one first set of plasmonic resonators interwoven with at least one second set of plasmonic resonators, wherein the at least one first set of plasmonic resonators is configured to be resonant with light at a first wavelength, and wherein the at least one second set of plasmonic resonators is configured to be resonant with light at a second wavelength. A method for analyzing a target gas and a method for forming a plasmonic resonance detector are also provided.

    RF-transistors with self-aligned point contacts
    18.
    发明授权
    RF-transistors with self-aligned point contacts 有权

    公开(公告)号：US10263188B2

    公开(公告)日：2019-04-16

    申请号：US15585584

    申请日：2017-05-03

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Shu-Jen Han

    IPC: H01L51/00 ,  H01L51/10 ,  H01L51/05

    Abstract: A method of fabricating a semiconductor device includes depositing a dielectric layer on a substrate and a nanomaterial on the dielectric layer. The method also includes depositing a thin metal layer on the nanomaterial and removing a portion of the thin metal layer from a gate area. The method also includes depositing a gate dielectric layer. The method also includes selectively removing the gate dielectric layer from a source contact region and a drain contact region. The method also includes patterning a gate electrode, a source electrode, and a drain electrode.

    Placement of Carbon Nanotube Guided by DSA Patterning
    20.
    发明申请
    Placement of Carbon Nanotube Guided by DSA Patterning 审中-公开

    公开(公告)号：US20180269412A1

    公开(公告)日：2018-09-20

    申请号：US15461175

    申请日：2017-03-16

    Applicant: International Business Machines Corporation

    Inventor： Ali Afzali-Ardakani ,  Sarunya Bangsaruntip ,  Shu-Jen Han ,  HsinYu Tsai

    IPC: H01L51/05 ,  H01L51/00

    CPC classification number: H01L51/0558 ,  H01L51/0003 ,  H01L51/0012 ,  H01L51/0049 ,  H01L51/0093 ,  H01L51/0545 ,  H01L2251/303

    Abstract: In one aspect, a method for placing carbon nanotubes on a dielectric includes: using DSA of a block copolymer to create a pattern in the placement guide layer on the dielectric which includes multiple trenches in the placement guide layer, wherein there is a first charge on sidewall and top surfaces of the trenches and a second charge on bottom surfaces of the trenches, and wherein the first charge is different from the second charge; and depositing a carbon nanotube solution onto the dielectric, wherein self-assembly of the deposited carbon nanotubes within the trenches occurs based on i) attractive forces between the first charge on the surfaces of the carbon nanotubes and the second charge on the bottom surfaces of the trenches and ii) repulsive forces between the first charge on the surfaces of the carbon nanotubes and the first charge on sidewall and top surfaces of the trenches.

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