公开(公告)号：US11190208B2

公开(公告)日：2021-11-30

申请号：US16905200

申请日：2020-06-18

Applicant: Intel Corporation

Inventor： Adee Ofir Ran ,  Amir Mezer ,  Alon Meisler ,  Assaf Benhamou ,  Itamar Levin ,  Yoni Landau

IPC: G06F11/00 ,  H03M13/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/35 ,  H03M13/13 ,  H04L1/20

Abstract: Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.

公开(公告)号：US10666230B2

公开(公告)日：2020-05-26

申请号：US16116690

申请日：2018-08-29

Applicant: Intel Corporation

Inventor： Adee Ofir Ran ,  Itamar Fredi Levin

IPC: H04B14/04 ,  H03H11/28 ,  H04B1/04 ,  H03F1/56 ,  H03F3/24 ,  H03F3/45 ,  H03F3/189

Abstract: There is disclosed in one example an integrated circuit, including: a network protocol circuit to provide communication via a network protocol; a network communication terminal having a configurable impedance; and a control circuit including a control input port, and circuitry to adjust the impedance of the network communication terminal responsive to an input signal.

公开(公告)号：US20190058457A1

公开(公告)日：2019-02-21

申请号：US16116690

申请日：2018-08-29

Applicant: Intel Corporation

Inventor： Adee Ofir Ran ,  Itamar Fredi Levin

IPC: H03H11/28 ,  H03F1/56 ,  H04B1/04

CPC classification number: H03H11/28 ,  H03F1/56 ,  H03F3/189 ,  H03F3/24 ,  H03F3/45475 ,  H03F2203/45591 ,  H03F2203/45686 ,  H04B1/0458

Abstract: There is disclosed in one example an integrated circuit, including: a network protocol circuit to provide communication via a network protocol; a network communication terminal having a configurable impedance; and a control circuit including a control input port, and circuitry to adjust the impedance of the network communication terminal responsive to an input signal.

公开(公告)号：US12197368B2

公开(公告)日：2025-01-14

申请号：US18375054

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Kevan A. Lillie ,  Shlomi Lalush ,  Yaakov Dalsace ,  Adee Ofir Ran ,  Assaf Benhamou ,  David Golodni ,  Itay Tamir ,  Amir Laufer

IPC: G06F13/20 ,  G06F9/4401 ,  G06F13/16 ,  G06F13/38 ,  G06F30/18

Abstract: Techniques and apparatus to provide for interactions between system components are described. In one embodiment, an apparatus to provide a component interface, the apparatus comprising at least one memory, a first component comprising at least one register, logic, at least a portion of comprised in hardware, the logic to define at least one interface field stored in the at least one register, generate an interface with a second component based on the at least one interface field, and receive interface information from the second component via the interface, the interface information comprising at least one value for the at least one interface field.

公开(公告)号：US20240020256A1

公开(公告)日：2024-01-18

申请号：US18375054

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Kevan A. Lillie ,  Shlomi Lalush ,  Yaakov Dalsace ,  Adee Ofir Ran ,  Assaf Benhamou ,  David Golodni ,  Itay Tamir ,  Amir Laufer

IPC: G06F13/38 ,  G06F13/16 ,  G06F13/20 ,  G06F9/4401 ,  G06F30/18

CPC classification number: G06F13/382 ,  G06F13/16 ,  G06F13/20 ,  G06F9/4411 ,  G06F30/18 ,  G06F2213/0026 ,  G06F2213/0024

Abstract: Techniques and apparatus to provide for interactions between system components are described. In one embodiment, an apparatus to provide a component interface, the apparatus comprising at least one memory, a first component comprising at least one register, logic, at least a portion of comprised in hardware, the logic to define at least one interface field stored in the at least one register, generate an interface with a second component based on the at least one interface field, and receive interface information from the second component via the interface, the interface information comprising at least one value for the at least one interface field.

公开(公告)号：US11706059B2

公开(公告)日：2023-07-18

申请号：US17573565

申请日：2022-01-11

Applicant: Intel Corporation

Inventor： Adee Ofir Ran

IPC: H04L25/03 ,  H04L25/49 ,  H04B10/25

CPC classification number: H04L25/03019 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/4917 ,  H04B10/25891 ,  H04L2025/03783 ,  H04L2025/03808

Abstract: Selection of equalization coefficients to configure a communications link between a receiver in a host system and a transmitter in an optical or electrical communication module is performed by a management entity with access to management registers in the receiver and transmitter. Continuous modification of the selected equalization coefficients is enabled on the communications link after the communications link is established to handle varying operating conditions such as temperature and humidity.

公开(公告)号：US10924132B2

公开(公告)日：2021-02-16

申请号：US16324172

申请日：2017-09-08

Applicant: Intel Corporation

Inventor： Adee Ofir Ran ,  Amir Mezer ,  Alon Meisler ,  Assaf Benhamou ,  Itamar Levin ,  Yoni Landau

IPC: G06F11/00 ,  H03M13/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/35 ,  H03M13/13 ,  H04L1/20

Abstract: Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.

公开(公告)号：US20190215008A1

公开(公告)日：2019-07-11

申请号：US16324172

申请日：2017-09-08

Applicant: Intel Corporation

Inventor： Adee Ofir Ran ,  Amir Mezer ,  Alon Meisler ,  Assaf Benhamou ,  Itamar Levin ,  Yoni Landau

IPC: H03M13/01 ,  H03M13/35 ,  H03M13/15 ,  H03M13/09

CPC classification number: H03M13/015 ,  H03M13/09 ,  H03M13/13 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/353 ,  H04L1/203

Abstract: Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.