公开(公告)号：US10902911B2

公开(公告)日：2021-01-26

申请号：US16676330

申请日：2019-11-06

Applicant: Intel Corporation

Inventor： Davide Mantegazza ,  Sandeep Guliani ,  Balaji Srinivasan ,  Kiran Pangal

IPC: G11C11/56 ,  G11C13/00 ,  G11C29/00

Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.

公开(公告)号：US20200301828A1

公开(公告)日：2020-09-24

申请号：US16894180

申请日：2020-06-05

Applicant: Intel Corporation

Inventor： Jawad Khan ,  Chetan Chauhan ,  Rajesh Sundaram ,  Sourabh Dongaonkar ,  Sandeep Guliani ,  Dipanjan Sengupta ,  Mariano Tepper

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/40

Abstract: Technologies for column reads for clustered data include a device having a column-addressable memory and circuitry connected to the memory. The column-addressable memory includes multiple dies. The circuitry may be configured to determine multiple die offsets based on a logical column number of the data cluster, determine a base address based on the logical column number, program the dies with the die offsets. The circuitry is further to read logical column data from the column-addressable memory. To read the data, each die adds the corresponding die offset to the base address. The column-addressable memory may include multiple command/address buses. The circuitry may determine a starting address for each of multiple logical columns and issue a column read for each starting address via a corresponding command/address bus. Other embodiments are described and claimed.

公开(公告)号：US20190013071A1

公开(公告)日：2019-01-10

申请号：US16037255

申请日：2018-07-17

Applicant: Intel Corporation

Inventor： Balaji Srinivasan ,  Daniel Chu ,  Lark-Hoon Leem ,  John Gorman ,  Mase Taub ,  Sandeep Guliani ,  Kiran Pangal

IPC: G11C13/00

Abstract: In one embodiment, an apparatus comprises read circuitry to apply a read voltage to a three dimensional crosspoint (3DXP) memory cell; and write setback circuitry to apply a first setback pulse having a first magnitude to the 3DXP memory cell in response to the application of the read voltage, wherein applying the first setback pulse comprises bypassing a current mirror that is to limit or control a magnitude of a second setback pulse applied to the 3DXP memory cell when the current mirror is coupled to the 3DXP memory cell.

公开(公告)号：US20200301825A1

公开(公告)日：2020-09-24

申请号：US15930889

申请日：2020-05-13

Applicant: Intel Corporation

Inventor： Chetan Chauhan ,  Sourabh Dongaonkar ,  Rajesh Sundaram ,  Jawad Khan ,  Sandeep Guliani ,  Dipanjan Sengupta ,  Mariano Tepper

IPC: G06F12/02 ,  G06F16/27

Abstract: Technologies for media management for providing column data layouts for clustered data include a device having a column-addressable memory and circuitry connected to the memory. The circuitry is configured to store a data cluster of a logical matrix in the column-addressable memory with a column-based format and to read a logical column of the data cluster from the column-addressable memory with a column read operation. Reading the logical column may include reading logical column data diagonally from the column-address memory, including reading from the data cluster and a duplicate copy of the data cluster. Reading the logical column may include reading from multiple complementary logical columns. Reading the logical column may include reading logical column data diagonally with a modulo counter. The column data may bread from a partition of the column-address memory selected based on the logical column number. Other embodiments are described and claimed.

公开(公告)号：US10475508B2

公开(公告)日：2019-11-12

申请号：US15854638

申请日：2017-12-26

Applicant: Intel Corporation

Inventor： Davide Mantegazza ,  Sandeep Guliani ,  Balaji Srinivasan ,  Kiran Pangal

IPC: G11C11/00 ,  G11C13/00 ,  G11C29/00

Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.

公开(公告)号：US20180286478A1

公开(公告)日：2018-10-04

申请号：US15854638

申请日：2017-12-26

Applicant: Intel Corporation

Inventor： Davide Mantegazza ,  Sandeep Guliani ,  Balaji Srinivasan ,  Kiran Pangal

IPC: G11C13/00 ,  G11C29/00

CPC classification number: G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0033 ,  G11C13/004 ,  G11C29/70

Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.

公开(公告)号：US20170186486A1

公开(公告)日：2017-06-29

申请号：US15333096

申请日：2016-10-24

Applicant: Intel Corporation

Inventor： Davide Mantegazza ,  Sandeep Guliani ,  Balaji Srinivasan ,  Kiran Pangal

IPC: G11C13/00

CPC classification number: G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0033 ,  G11C13/004 ,  G11C29/70

Abstract: Threshold switching devices demonstrating transient current protection through both insulation and repair current mechanisms, including associated systems and methods, are provided and discussed.