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    Stacked bi-layer as the low power switchable RRAM
    12.
    发明授权
    Stacked bi-layer as the low power switchable RRAM 有权
    堆叠双层作为低功率可切换RRAM

    公开(公告)号：US09246094B2

    公开(公告)日：2016-01-26

    申请号：US14140683

    申请日：2013-12-26

    Applicant: Intermolecular Inc.

    Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

    IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/1266 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1633

    Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode.

    Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 电阻式开关非易失性存储单元可以包括设置的第一层。 第一层可以用作底部电极。 电阻式开关非易失性存储单元还可以包括设置在第一层上的第二层。 第二层可以用作电阻性开关层，其被配置为在第一电阻状态和第二电阻状态之间切换。 电阻式开关非易失性存储单元可以包括设置在第二层上的第三层。 第三层可以用作电阻层，其被配置为至少部分地确定电阻式开关非易失性存储元件的电阻率。 第三层可以包括半金属材料。 电阻式开关非易失性存储单元可以包括可以用作顶部电极的第四层。

    ReRAM cells with diffusion-resistant metal silicon oxide layers
    13.
    发明授权
    ReRAM cells with diffusion-resistant metal silicon oxide layers 有权
    ReRAM电池具有耐扩散性的金属氧化硅层

    公开(公告)号：US09246091B1

    公开(公告)日：2016-01-26

    申请号：US14338979

    申请日：2014-07-23

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Federico Nardi

    IPC: H01L27/24 ,  H01L45/00

    CPC classification number: H01L45/1253 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

    Abstract: A metal silicon oxide barrier layer between a nitride electrode containing the same metal and an oxide variable-resistance layer in a ReRAM cell prevents the metal from diffusing into the variable-resistance layer and prevents oxygen from diffusing into and oxidizing the electrode. Compound oxides of the same metal and silicon with varying stoichiometries and metal/silicon ratios may optionally replace part or all of the variable-resistance layer, a defect-reservoir layer, or both. The metal nitride electrode may include a metal silicon nitride current-limiting portion. Optionally, all the layers sharing the common metal may be formed in-situ as part of a single unit process, such as atomic layer deposition.

    Abstract translation: 在ReRAM单元中含有相同金属的氮化物电极和氧化物可变电阻层之间的金属氧化硅阻挡层防止金属扩散到可变电阻层中，并防止氧气扩散到氧化电极。 具有不同化学计量和金属/硅比的相同金属和硅的复合氧化物可任选地替代部分或全部可变电阻层，缺陷储层或两者。 金属氮化物电极可以包括金属氮化硅限流部。 可选地，共享公共金属的所有层可以原位形成为单个单元工艺的一部分，例如原子层沉积。

    Resistive random access memory cells having shared electrodes with transistor devices
    14.
    发明授权
    Resistive random access memory cells having shared electrodes with transistor devices 有权
    具有与晶体管器件共享的电极的电阻式随机存取存储器单元

    公开(公告)号：US09178000B1

    公开(公告)日：2015-11-03

    申请号：US14264280

    申请日：2014-04-29

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Federico Nardi ,  Ryan C. Clarke ,  Tim Minvielle ,  Yun Wang

    IPC: H01L29/02 ,  H01L29/792 ,  H01L27/11 ,  H01L21/00 ,  H01L27/24 ,  H01L45/00 ,  H01L29/08 ,  H01L21/265 ,  H01L21/02

    CPC classification number: H01L27/2463 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/265 ,  H01L27/2436 ,  H01L29/0847 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

    Abstract: Provided are resistive random access memory (ReRAM) cells having extended conductive layers operable as electrodes of other devices, and methods of fabricating such cells and other devices. A conductive layer of a ReRAM cell extends beyond the cell boundary defined by the variable resistance layer. The extended portion may be used a source or drain region of a FET that may control an electrical current through the cell or other devices. The extended conductive layer may be also operable as electrode of another resistive-switching cell or a different device. The extended conductive layer may be formed from doped silicon. The variable resistance layer of the ReRAM cell may be positioned on the same level as a gate dielectric layer of the FET. The variable resistance layer and the gate dielectric layer may have the same thickness and share common materials, though they may be differently doped.

    Abstract translation: 提供了具有可操作为其他器件的电极的延伸导电层的电阻随机存取存储器（ReRAM）单元，以及制造这样的单元和其它器件的方法。 ReRAM单元的导电层延伸超过由可变电阻层限定的单元边界。 延伸部分可以用于可控制通过电池或其他装置的电流的FET的源极或漏极区域。 扩展导电层也可以作为另一电阻式开关电池或不同器件的电极工作。 延伸的导电层可以由掺杂的硅形成。 ReRAM单元的可变电阻层可以位于与FET的栅极电介质层相同的水平上。 可变电阻层和栅极电介质层可以具有相同的厚度并且共享共同的材料，尽管它们可以是不同的掺杂。

    Electron barrier height controlled interfaces of resistive switching layers in resistive random access memory cells
    17.
    发明授权
    Electron barrier height controlled interfaces of resistive switching layers in resistive random access memory cells 有权
    电阻式随机存取存储单元中电阻开关层的电子势垒高度控制接口

    公开(公告)号：US09246087B1

    公开(公告)日：2016-01-26

    申请号：US14551878

    申请日：2014-11-24

    Applicant: Intermolecular Inc.

    Inventor： Yun Wang ,  Federico Nardi

    IPC: H01L45/00

    CPC classification number: H01L45/12 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/1608 ,  H01L45/1625

    Abstract: Provided are resistive switching memory cells and method of forming such cells. A memory cell includes a resistive switching layer disposed between two buffer layers. The electron barrier height of the material used for each buffer layer is less than the electron barrier height of the material used for the resistive switching layer. Furthermore, the thickness of each buffer layer may be less than the thickness of the resistive switching layer. The buffer layers reduce diffusion between the resistive switching layer and electrodes. Furthermore, the buffer layers improve data retention and prevent unintentional resistive switching when a reading signal is applied to the memory cell. The reading signal uses a low voltage and most of the electron tunneling is blocked by the buffer layers during this operation. On the other hand, the buffer layers allow electrode tunneling at higher voltages used for forming and switching signals.

    Abstract translation: 提供了电阻式开关存储单元和形成这种单元的方法。 存储单元包括设置在两个缓冲层之间的电阻式开关层。 用于每个缓冲层的材料的电子势垒高度小于用于电阻式开关层的材料的电子势垒高度。 此外，每个缓冲层的厚度可以小于电阻式开关层的厚度。 缓冲层减少电阻式开关层和电极之间的扩散。 此外，当读取信号被施加到存储器单元时，缓冲层改善数据保持并防止无意的电阻性切换。 读取信号使用低电压，并且在该操作期间大部分电子隧道被缓冲层阻挡。 另一方面，缓冲层允许用于形成和切换信号的较高电压下的电极隧穿。

    CURRENT-LIMITING ELECTRODES
    18.
    发明申请
    CURRENT-LIMITING ELECTRODES 有权
    电流限制电极

    公开(公告)号：US20160020392A1

    公开(公告)日：2016-01-21

    申请号：US14336652

    申请日：2014-07-21

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

    IPC: H01L45/00

    CPC classification number: H01L45/145 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/1608 ,  H01L45/1625 ,  H01L45/1641

    Abstract: A resistive-switching memory (ReRAM cell) has a current-limiting electrode layer that combines the functions of an embedded resistor, an outer electrode, and an intermediate electrode, reducing the thickness of the ReRAM stack and simplifying the fabrication process. The materials include compound nitrides of a transition metal and one of aluminum, boron, or silicon. In experiments with tantalum silicon nitride, peak yield in the desired resistivity range corresponded to ˜24 at % silicon and ˜32 at % nitrogen, believed to optimize the trade-off between inhibiting TaSi2 formation and minimizing nitrogen diffusion. A binary metal nitride may be formed at one or more of the interfaces between the current-limiting electrode and neighboring layers such as metal-oxide switching layers.

    Abstract translation: 电阻式开关存储器（ReRAM单元）具有限流电极层，其结合了嵌入式电阻器，外部电极和中间电极的功能，减小了ReRAM堆叠的厚度并简化了制造工艺。 这些材料包括过渡金属和铝，硼或硅之一的化合物氮化物。 在使用钽氮化硅的实验中，所需电阻率范围内的峰值产率对应于〜24at％的硅和〜32at％的氮，据信可以优化抑制TaSi2形成和最小化氮扩散之间的折衷。 二元金属氮化物可以形成在限流电极和相邻层之间的界面中的一个或多个处，例如金属氧化物开关层。

    Voltage Controlling Assemblies Including Variable Resistance Devices
    19.
    发明申请
    Voltage Controlling Assemblies Including Variable Resistance Devices 有权
    包括可变电阻器件的电压控制组件

    公开(公告)号：US20150188492A1

    公开(公告)日：2015-07-02

    申请号：US14140821

    申请日：2013-12-26

    Applicant: Intermolecular Inc.

    Inventor： Federico Nardi ,  Yun Wang

    IPC: H03B7/06

    CPC classification number: H03B7/06 ,  G11C11/16 ,  G11C13/0002 ,  G11C13/0038 ,  G11C13/0061 ,  H03K3/0231

    Abstract: Provided are voltage controlling assemblies that may be operable as clocks and/or oscillators. A voltage controlling assembly may include a comparator and a variable resistance device connected to one differential signal node of the comparator. The other node may be connected to a capacitor. Alternatively, no capacitors may be used in the assembly. During operation of the voltage controlling assembly, the variable resistance device changes its resistance between two different resistive states. The change from a low to a high resistive state may be associated with a voltage spike at the differential signal node of the comparator and trigger a response from the comparator. This resistance change may have a delay determining an operating frequency of the voltage controlling assembly. Specifically, the variable resistance device in the low resistive state may be kept for a period of time at a certain voltage before it switches into the high resistive state.

    Abstract translation: 提供了可以用作时钟和/或振荡器的电压控制组件。 电压控制组件可以包括连接到比较器的一个差分信号节点的比较器和可变电阻器件。 另一个节点可以连接到电容器。 或者，组件中不能使用电容器。 在电压控制组件的操作期间，可变电阻器件改变其在两个不同电阻状态之间的电阻。 从低电阻状态到高电阻状态的变化可能与比较器的差分信号节点处的电压尖峰相关联，并且触发来自比较器的响应。 该电阻变化可以具有确定电压控制组件的工作频率的延迟。 具体地说，低电阻状态的可变电阻器件在切换到高电阻状态之前，可以将其保持一定时间。

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