Timing generation circuit, display apparatus, and portable terminal
    11.
    发明授权
    Timing generation circuit, display apparatus, and portable terminal 有权
    定时发生电路,显示装置和便携式终端

    公开(公告)号:US07250941B2

    公开(公告)日:2007-07-31

    申请号:US10484994

    申请日:2003-05-06

    IPC分类号: G09G5/00

    摘要: A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFF1out to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit (11) generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section (12) operates based on this operating clock and successively outputs shifted pulses S/R1out to S/Rmount from shift registers (121-1) to (121-m). An output pulse generating section (13) generates output pulses SF1out to SFnout based on combinations of the shifted pulses S/R1out to S/Rmount.

    摘要翻译: 具有低功耗和小布局区域的定时发生电路,包括作为一个外围驱动电路的定时发生电路的显示装置和包括作为显示输出部分的显示装置的便携式终端。 在定时发生电路中,形成在绝缘衬底上并基于主时钟MCK产生具有不同频率的输出脉冲SRFF1至SRFFnout,时钟发生电路(11)产生频率低于主器件的工作时钟 时钟MCK频率。 然后,基于该工作时钟,计数部(12)进行动作,从移位寄存器(121-1)〜(121-m)依次输出移位脉冲S / R 1〜S / Rmount。 输出脉冲生成部(13)根据移位脉冲S / R 1 out〜S / R mount的组合,生成输出脉冲SF1〜SFnout。

    Active matrix display device
    13.
    发明授权
    Active matrix display device 失效
    主动矩阵显示装置

    公开(公告)号:US5625376A

    公开(公告)日:1997-04-29

    申请号:US267608

    申请日:1994-06-29

    申请人: Toshikazu Maekawa

    发明人: Toshikazu Maekawa

    摘要: An active matrix display device is disclosed which realizes changing over between a wide display and a normal display with a simple construction. The active matrix display device includes picture elements disposed in rows and columns on a horizontally elongated screen. A gate line is connected to each picture element row, while a data line is connected to each picture element column. A signal line for supplying a video signal and data lines are connected by way of sampling switches. A horizontal shift register controls sequential opening and closing operations of the sampling switches. The picture element columns of the horizontally elongated screen are divided into a predetermined area allocated to a normal display and a pair of expansion areas included in a wide display. The horizontal shift register is divided into a predetermined stage section corresponding to the predetermined area and expansion stage sections corresponding to the expansion areas. For a wide display, the predetermined and expansion stage sections of the horizontal shift register are interconnected serially into an integrated condition, but upon normal display, the expansion stage sections are disconnected from the predetermined stage section.

    摘要翻译: 公开了一种有源矩阵显示装置,其以简单的结构实现了宽显示和正常显示之间的切换。 有源矩阵显示装置包括在水平细长的屏幕上以行和列布置的图像元素。 栅极线连接到每个像素行,而数据线连接到每个像素列。 用于提供视频信号和数据线的信号线通过采样开关连接。 水平移位寄存器控制采样开关的顺序打开和关闭操作。 水平细长屏幕的像素列被划分为分配给正常显示的预定区域和包括在宽显示屏中的一对展开区域。 水平移位寄存器被分成对应于预定区域的预定段段和对应于扩展区域的扩展级段。 对于宽显示,水平移位寄存器的预定和扩展级部分串联地互连成一个整合状态,但是在正常显示时,扩展级段与预定级段断开连接。

    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, and liquid crystal display device incorporating the same
    16.
    发明授权
    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, and liquid crystal display device incorporating the same 有权
    数字/模拟转换器电路,电平移位电路,利用电平移位电路的移位寄存器,采样锁存电路以及包含该电路的液晶显示装置

    公开(公告)号:US08031188B2

    公开(公告)日:2011-10-04

    申请号:US12081269

    申请日:2008-04-14

    IPC分类号: G09G5/00

    摘要: A digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels. A level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.

    摘要翻译: 数字/模拟转换器电路,电平移位电路,包含该电平移位电路的移位寄存器,采样锁存电路和锁存电路以及安装有这些各自电路的液晶显示装置,其中与 包含数字/模拟转换器电路的LCD装置具有在基板上以矩阵形式排列的多晶硅薄膜晶体管作为用于像素的开关器件。 移位寄存器中的电平移位电路具有CMOS锁存单元的基本结构,并且在每个传输级的时钟信号的每个电平移位中被使用,具有CMOS锁存单元的基本结构的采样锁存电路具有电平移位功能, 并且这些各个电路可以与驱动电路集成液晶显示装置结合到单个扫描型结构电路中,以提供具有极窄图像帧的LCD面板,稳定的电平移位操作,电路结构中的稳定采样和锁存操作 具有极少数量的部件,低功耗和小的表面积。

    Timing generating circuit, display apparatus, and portable terminal
    17.
    发明授权
    Timing generating circuit, display apparatus, and portable terminal 有权
    定时发生电路,显示装置和便携式终端

    公开(公告)号:US07932901B2

    公开(公告)日:2011-04-26

    申请号:US11880699

    申请日:2007-07-24

    IPC分类号: G09G5/00

    摘要: A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFF1out to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit (11) generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section (12) operates based on this operating clock and successively outputs shifted pulses S/R1out to S/Rmount from shift registers (121-1) to (121-m). An output pulse generating section (13) generates output pulses SF1out to SFnout based on combinations of the shifted pulses S/R1out to S/Rmount.

    摘要翻译: 具有低功耗和小布局区域的定时发生电路,包括作为一个外围驱动电路的定时发生电路的显示装置和包括作为显示输出部分的显示装置的便携式终端。 在形成在绝缘基板上的定时发生电路中,基于主时钟MCK产生具有不同频率的输出脉冲SRFF1out〜SRFFnout,时钟发生电路(11)生成频率低于主时钟MCK的工作时钟 频率。 然后,基于该工作时钟,计数部(12)工作,从移位寄存器(121-1)至(121-m)依次输出移位脉冲S / R1out至S / Rmount。 输出脉冲生成部(13)根据移位脉冲S / R1out〜S / Rmount的组合,生成输出脉冲SF1out〜SFnout。

    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, and liquid crystal display device incorporating the same
    18.
    发明申请
    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, and liquid crystal display device incorporating the same 有权
    数字/模拟转换器电路,电平移位电路,利用电平移位电路的移位寄存器,采样锁存电路以及包含该电路的液晶显示装置

    公开(公告)号:US20080224972A1

    公开(公告)日:2008-09-18

    申请号:US12081269

    申请日:2008-04-14

    IPC分类号: G09G3/36 H03M1/66

    摘要: This invention relates to a digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels, a level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.

    摘要翻译: 本发明涉及数字/模拟转换器电路,电平移位电路,包含该电平移位电路的移位寄存器,采样锁存电路和锁存电路以及安装有这些各自电路的液晶显示装置,其中驱动器 与包含数字/模拟转换器电路的LCD装置集成的电路具有在基板上以矩阵形式排列的用于像素的开关装置的多晶硅薄膜晶体管,移位寄存器中的电平移位电路具有CMOS锁存单元的基本结构,并且 在每个传输级的时钟信号的每个电平移位中使用的具有CMOS锁存单元的基本结构的采样锁存电路具有电平移位功能,并且这些各个电路可以并入到具有驱动电路的单个扫描型结构电路中 集成液晶显示装置,为LCD面板提供极窄的画面,稳定的电平转换操作 具有极少数量的部件,低功耗和小的表面积的电路结构中的表采样和锁存操作。

    Liquid crystal display device, method of controlling the same, and mobile terminal
    19.
    发明申请
    Liquid crystal display device, method of controlling the same, and mobile terminal 有权
    液晶显示装置,其控制方法和移动终端

    公开(公告)号:US20070195038A1

    公开(公告)日:2007-08-23

    申请号:US11789279

    申请日:2007-04-23

    IPC分类号: G09G3/36

    摘要: A liquid crystal display device enabling a reduction in size and costs associated with the system as a whole, starting to display images without image distortion at power on time, and turning the screen off without image retention at power off time, a method of controlling the liquid crystal display device, and a mobile terminal incorporating the liquid crystal display device as a screen display. On a glass substrate (11) provided with a display unit (12), peripheral drive circuits such as an interface circuit (13), a timing generator (14), a reference voltage driver (15), a CS driver (18), a VCOM driver (19), and a voltage regulation circuit (20), together with a horizontal driver (16) and a vertical driver (17) are disposed. When a display reset control pulse PCI is supplied from an external source, a predetermined voltage is written into pixels while a CS voltage and a VCOM voltage adjusted to the same level as that of a pixel voltage are applied to a common-electrode-side. This allows the screen to turn white in a normally white type liquid crystal display, and to turn black in a normally black type liquid crystal display. Image distortion at power on/off time can thus be prevented.

    摘要翻译: 一种液晶显示装置,其能够与整个系统相关联地减小尺寸和成本,开始显示在通电时间没有图像失真的图像,并且在断电时关闭屏幕而不进行图像保持;控制方法 液晶显示装置和结合有液晶显示装置的移动终端作为画面显示。 在设置有显示单元(12)的玻璃基板(11)上,诸如接口电路(13),定时发生器(14),参考电压驱动器(15),CS驱动器(18), 设置VCOM驱动器(19)和电压调节电路(20)以及水平驱动器(16)和垂直驱动器(17)。 当从外部源提供显示复位控制脉冲PCI时,将预定电压写入像素,同时将CS电压和VCOM电压调整到与像素电压相同的电平施加到共电极侧。 这允许屏幕在普通白色液晶显示器中变为白色,并且在常黑型液晶显示器中变黑。 因此可以防止电源开/关时的图像失真。

    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, latch circuit and liquid crystal display device incorporating the same
    20.
    发明授权
    Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, latch circuit and liquid crystal display device incorporating the same 失效
    数字/模拟转换器电路,电平移位电路,利用电平移位电路的移位寄存器,采样锁存电路,锁存电路和结合其的液晶显示装置

    公开(公告)号:US06664943B1

    公开(公告)日:2003-12-16

    申请号:US09466969

    申请日:1999-12-20

    IPC分类号: G09G336

    摘要: This invention relates to a digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels, a level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.

    摘要翻译: 本发明涉及数字/模拟转换器电路,电平移位电路,包含该电平移位电路的移位寄存器,采样锁存电路和锁存电路以及安装有这些各自电路的液晶显示装置,其中驱动器 与包含数字/模拟转换器电路的LCD装置集成的电路具有在基板上以矩阵形式排列的用于像素的开关装置的多晶硅薄膜晶体管,移位寄存器中的电平移位电路具有CMOS锁存单元的基本结构,并且 在每个传输级的时钟信号的每个电平移位中使用的具有CMOS锁存单元的基本结构的采样锁存电路具有电平移位功能,并且这些各个电路可以并入到具有驱动电路的单个扫描型结构电路中 集成液晶显示装置,为LCD面板提供极窄的画面,稳定的电平转换操作 具有极少数量的部件,低功耗和小的表面积的电路结构中的表采样和锁存操作。