摘要:
An apparatus for detecting the position of an object. The apparatus has an optical device for magnifying or enlarging a plurality of portions on the object, a photoelectric converter adapted for converting the enlarged portion image into electric signals, a plurality of thresholding circuits adapted for changing analogue signals from the respective photoelectric converter into binary signals with a threshold value determined by a signal level given by a first signal holding circuit, a circuit for calculating the threshold value from the analogue signals, a circuit for detecting the approximate position of a specific pattern in the enlarged portion images through a coarse sampling of the binary signals. A circuit for detecting the exact position of the specific pattern through measuring the area of a specific brightness in a plurality of regions in the enlarged portion images, by a fine sampling of the binary signals, and a controller for controlling the operations of respective circuits.
摘要:
A microprogrammed control system comprises: a memory for storing a microprogram programmed with microinstructions; a memory for storing microinstructions for branching microinstruction; an address register for storing the address of the microinstruction to be next executed; and a microinstruction register for storing the microinstruction to be executed. The program operation of the microprogrammed control system depends on whether the micro-instruction stored in the microinstruction register is the branching one or not. In the case of non-branching microinstruction, the operation of ordinary microinstructions is executed. In the case of branching microinstruction, a special operation is executed for making the operation of the branching microinstruction equivalent to that of the ordinary microinstruction.
摘要:
A microprogrammed LSI microprocessor comprises a read only memory (ROM) for storing therein microprograms and a decode table for the operation code of macroinstructions, and an arithmetic logic control section constructed into a one package of LSI circuit. The arithmetic logic control section is constructed into a circuit arrangement which, on the assumption that the operation code of macroinstructions be an address, sets the starting address of a corresponding macroinstruction read from the ROM in a location counter, reads from the ROM a microinstruction corresponding to the starting address set in the location counter to set this microinstruction in a microinstruction register, and arithmetically executes the microinstruction stored in the microinstruction register.
摘要:
An ethylene resin composition comprising an ethylene polymer, or a copolymer of ethylene with one or more components copolymerizable with ethylene, and alumina trihydrate having a gibbsite crystal structure, and various moldings produced from the ethylene resin composition having excellent physical and chemical properties are disclosed.
摘要:
An apparatus for replenishing paint into a paint cartridge (25), which is capable of putting paint in respiratory circulation while the cartridge is in a waiting state. The apparatus includes a replenishing valve (61) which is capable of feeding paint to and from a paint chamber (30) of the paint cartridge (25) which is set on a replenishing stool (52), and a respiratory paint circulation valve (91) which is capable of feeding paint-extruding thinner to and from a thinner chamber (31) of the cartridge. After switching the replenishing valve (61) to a drain or discharge side, paint-extruding thinner is supplied from the respiratory paint circulation valve (91) to push paint out of the paint chamber (30) of the cartridge (25). Then, after switching the replenishing valve (61) to the side of a paint supply source, paint-extruding thinner is discharged by way of the respiratory paint circulation valve (91) to suck paint into the paint chamber (30). As a consequence, paint in the cartridge (25) is put in respiratory circulation to prevent separation and sedimentation of pigment components of the paint.
摘要:
A disposable absorbent article such as a disposable diaper including first stretchable side flaps extending over transversely opposite outer zones of the diaper and second stretchable side flaps functioning as liquid-barriers each having a proximal edge and a distal edge arranged so as to define an exposed zone of a topsheet along each of transversely opposite side edge surfaces of a liquid-absorbent core and thereby, if a quantity of liquid excretions gets over the distal edge of the second side flaps, it can be absorbed by the liquid-absorbent core through the exposed zones.
摘要:
In a one-chip high density arithmetic control unit capable of prefetching user's instructions from main memory, an arithmetic logic unit (ALU) subtracts the contents of a location counter holding the address of the next instruction to be executed, from the contents of a memory address register holding an address into which data will be written. The difference is fed through the gates connected to the ALU for determining whether or not prefetched instructions will have to be refetched. An address matching mechanism provided outside the one-chip arithmetic control unit includes a comparator for comparing memory addresses to a preset execution stop address. The output signal of the comparator is stored in a memory section which is provided to correspond to the prefetched instruction buffer, and when an instruction stored in the prefetched instruction buffer is transferred to an instruction register, the signal stored in the corresponding memory section is also read out and used to determine whether to stop execution. Further, whenever access is made to main memory a signal indicating whether the access is legal is externally generated and may be stored in a second memory section. Like the address matching signal, this signal is read out when the corresponding instruction from the prefeteched instruction buffer is transferred to the instruction register. An illegal address interruption is produced when this signal indicates that the address was illegal.
摘要:
A shift circuit comprises a plurality of stages of data selectors, a first data selector, a second data selector and a temporary register. The data selectors shift an n-bit input data by m bits which are specified by a shifting amount data and produces a first output data or a second output data. The first and second data selectors selectively output the first and second output data in accordance with shift direction. The temporary register comprises n bits for storing a data which is not selected by said first or second data selector.
摘要:
In an information processing system in which an arithmetic control unit is formed on one chip by very large scale integration and is connected to external devices by a common bus, microinstructions from an externally-connected control memory, memory information output from an external main memory and information output from I/O devices, can be received by the arithmetic control unit on the common bus. An external setting signal for selecting whether the instruction system of the arithmetic control unit is to be enabled or disabled is input to the arithmetic control unit on the common bus simultaneously with the fetching of a microinstruction. A bus width setting signal from an I/O device is also input to the arithmetic control unit on the common bus simultaneously with the fetching of a microinstruction, and the CPU determines whether the data width of an I/O device is 8 bits or 16 bits. An interruption signal from an I/O device and a signal indicating an abnormal condition of a power source, for example, may be input to the arithmetic control unit from external devices on the common bus as part of a group of external signals occupying only a portion of the common bus simultaneously with the fetching of a microinstruction on the remaining portion of the common bus. When exchanging a plurality of kinds of data with different phases between the arithmetic control unit and external devices on the common bus, an external status signal unique to each phase is input to the arithmetic control unit on a common signal line in synchronism with each phase.
摘要:
A computer system in which the configuration of a plurality of information processing modules, which are provided in at least first and second configuration points, may be automatically monitored and supervised, comprises a plurality of switching modules provided in a third configuration point, each switching module having a configuration point number and each of the information processing modules having an identification number; and a configuration monitoring center for at least monitoring the connecting conditions between the switching modules and the configuration monitoring center for supervision of the computer system. Timing signals are delivered from the configuration monitoring center to inquire about conditions in the information processing modules and switching modules. Status lines are provided for delivering response signals representing the conditions and identification numbers of the information processing modules and configuration point numbers of the switching modules in the first and second configuration points and third configuration point to the configuration monitoring center and status distribution lines are provided for transferring the response signals from the information processing modules in the first and second configuration points to the switching modules in the third configuration point. The switching modules in the third configuration point each include a response generator which is responsive to the timing signals for delivering a combination of response signals from the information processing modules in the first and second configuration points to the configuration monitoring center by way of the status lines.