公开(公告)号：US5557638A

公开(公告)日：1996-09-17

申请号：US212669

申请日：1994-03-10

申请人： Kevin D. Fisher ,  Ho W. Wong-Lam ,  Johannes W. M. Bergmans ,  Frits A. Steenhof ,  Johannes O. Voorman

发明人： Kevin D. Fisher ,  Ho W. Wong-Lam ,  Johannes W. M. Bergmans ,  Frits A. Steenhof ,  Johannes O. Voorman

IPC分类号： H04L25/03 ,  H03K5/08 ,  H03M13/23 ,  H04L25/06 ,  H04L25/12 ,  H04L25/30 ,  H04L25/34 ,  H04L25/49

CPC分类号： H03K5/088 ,  H04L25/061 ,  H04L25/12

摘要： In a digital transmission system including a transmitter (2) coupled via a channel (4) to a receiver (6) a detection signal r.sub.k is compared with a number of reference values to determine the destination symbols a.sub.k. Since the size of the received signal r.sub.k is not known in advance, the ratio between the detection signal and the reference values is to be determined by an adapting circuit (16) on the basis of the received signal and the decisions made. The problem may then occur that as a result of an initially erroneous value of the ratio between detection signal and reference values not a correct adaptation is made. By recognizing such a situation because specific values of the symbols a.sub.k are lacking, in such a situation said ratio can be brought to such a value by the correction circuit (18) that all the values of a.sub.k again occur.

摘要翻译： 在包括经由信道（4）耦合到接收机（6）的发射机（2）的数字传输系统中，将检测信号rk与多个参考值进行比较，以确定目的地符号+ E，cir a + EE k。 由于接收信号rk的大小预先不知道，所以检测信号与参考值之间的比率将由适配电路（16）根据接收到的信号和作出的决定来确定。 然后可能出现这样的问题，即由于检测信号和参考值之间的比率的最初错误的值不是正确的适应。 通过识别这种情况，因为缺少符号+ E，cir a + EE k的特定值，在这种情况下，可以通过校正电路（18）使所述比值达到这样的值，即所有的+ E， 再次出现cir a + EE k。

公开(公告)号：US5487085A

公开(公告)日：1996-01-23

申请号：US262726

申请日：1994-06-20

申请人： Ho W. Wong-Lam ,  Johannes W. Bergmans ,  Kevin D. Fisher

发明人： Ho W. Wong-Lam ,  Johannes W. Bergmans ,  Kevin D. Fisher

IPC分类号： H03H15/00 ,  H03H17/00 ,  H03H21/00 ,  H04B3/06 ,  H04L25/03 ,  H03H7/30

CPC分类号： H04L25/03038 ,  H04L2025/03477 ,  H04L2025/03617

摘要： In a digital transmission system comprising a transmitter (2) connected to a receiver (6) through a channel (4), this receiver comprises an equalizer (8) which includes an equalization filter (12) with output signals from which a sum weighted with weight factors is determined. The output signal of the equalizer is applied to a detector. According to the inventive idea a correction signal for correcting the coefficients w of the equalizer is derived from w.sub.k =w.sub.k-1 +Ma.sub.k e.sub.k, where a.sub.k is the vector of a plurality of successive detected symbols, and e.sub.k is a difference between the current input signal of the detector and a reconstructed ideal input signal of the detector.

摘要翻译： 在包括通过信道（4）连接到接收机（6）的发射机（2）的数字传输系统中，该接收机包括均衡器（8），该均衡器（8）包括均衡滤波器（12），输出信号与 确定体重因子。 均衡器的输出信号被施加到检测器。 根据本发明，用于校正均衡器的系数w的校正信号从wk = wk-1 +Mâkek导出，其中â是多个连续检测符号的向量，ek是当前输入信号之间的差 的检测器和重建的检测器的理想输入信号。

公开(公告)号：US5757822A

公开(公告)日：1998-05-26

申请号：US518945

申请日：1995-08-24

申请人： Kevin D. Fisher ,  Pablo A. Ziperovich

发明人： Kevin D. Fisher ,  Pablo A. Ziperovich

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B20/14 ,  G11B20/18 ,  H03M7/14 ,  H03M13/27 ,  H03M13/00 ,  H03M5/00 ,  H03M7/00

CPC分类号： G11B20/1866 ,  G11B20/10009 ,  G11B20/1426 ,  H03M13/27 ,  G11B2020/1434 ,  G11B2020/1446

摘要： A modulation method generates a rate 16/17 (d=0, G=7/I=11) modulation code for transferring user digital data bytes having a three-way ECC interleave through a data transfer channel in accordance with the steps of: shuffling the user data bytes in order to rearrange an order of the bytes in a predetermined manner and putting out A.sub.i B.sub.i byte pairs, encoding eight bits of the Ai bytes of the AiBi byte pairs in accordance with a predetermined rate 8/9 modulation code to produce nine code bits a0-a8, and interleaving the nine code bits a0-a8 of each Ai byte with eight unencoded bits of each Bi byte in accordance with a predetermined bitwise interleave pattern to generate the rate 16/17 modulation code. A preferred code and circuitry for the modulation method are also described.

摘要翻译： 调制方法根据以下步骤生成用于通过数据传送通道传送具有三路ECC交错的用户数字数据字节的速率16/17（d = 0，G = 7 / I = 11）调制码：洗牌 用户数据字节，以便以预定方式重新排列字节顺序并输出AiBi字节对，根据预定速率8/9调制码对AiBi字节对的Ai字节的8位进行编码，以产生9 代码比特a0-a8，并且根据预定的按位交织模式，将每个Ai字节的九个码比特a0-a8与每个Bi字节的八个未编码比特交织，以生成速率16/17调制码。 还描述了调制方法的优选代码和电路。

公开(公告)号：US5606466A

公开(公告)日：1997-02-25

申请号：US546628

申请日：1995-10-23

申请人： Kevin D. Fisher ,  Bruce Buch ,  Thomas Lau ,  Pablo A. Ziperovich

发明人： Kevin D. Fisher ,  Bruce Buch ,  Thomas Lau ,  Pablo A. Ziperovich

IPC分类号： G11B5/027 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B5/09 ,  H04N5/76

CPC分类号： G11B20/10009 ,  G11B20/1258 ,  G11B20/1426

摘要： A new method for overlapping block read events in a disk drive having synchronously sampled data detection channels is presented. In particular, the new method is for overlapping read back processing by real-time and digital signal processing of first and second data blocks from a storage medium. The method includes steps of clocking real-time and digital signal processes by a clock synchronized to the first data block while the first data block is passing by a data transducer head, clocking the digital signal processes for the first data block by an asynchronous clock operating at a nominal data clocking rate after the first data block has passed by the data transducer head and before a clock has synchronized to the second data block following the first data block, and clocking real-time signal processes for the second data block and completing clocking of the digital processes for the first data block by a clock synchronized to the second data block passing by the data transducer head. The storage medium can be a magnetic hard disk, magnetic tape, or an optical disk, for example.

摘要翻译： 提出了一种用于在具有同步采样数据检测通道的磁盘驱动器中重叠块读取事件的新方法。 特别地，新方法是通过来自存储介质的第一和第二数据块的实时和数字信号处理来重叠读回处理。 该方法包括以下步骤：通过与第一数据块同步的时钟对实时和数字信号处理进行计时，同时第一数据块通过数据传感器头，通过异步时钟操作为第一数据块的数字信号处理计时 在第一数据块经过数据变换器头之后并且在时钟已经与第一数据块之后的第二数据块同步之后的标称数据时钟速率，以及对第二数据块的实时信号处理进行计时并完成时钟 通过与数据传感器头通过的第二数据块同步的时钟来产生第一数据块的数字处理。 存储介质可以是例如磁性硬盘，磁带或光盘。

公开(公告)号：US5132988A

公开(公告)日：1992-07-21

申请号：US622106

申请日：1990-12-03

申请人： Kevin D. Fisher ,  William L. Abbott ,  John M. Cioffi ,  Philip S. Bednarz

发明人： Kevin D. Fisher ,  William L. Abbott ,  John M. Cioffi ,  Philip S. Bednarz

IPC分类号： G11B20/10 ,  H04L25/03

CPC分类号： G11B20/10046 ,  G11B20/10009 ,  H04L25/03057

摘要： Adaptive decision feedback equalizer apparatus for processing information stored on disk or tape media or the like including a data input buffer (34), a gain acquisition circuit (42), a timing acquisition circuit (40) operative to generate timing error signals for controlling the sampling phase of the read signals input to the input buffer, a synchronizing circuit (44) for generating sync detect signals and polarity signals, an FIR filter (36) for generating linear filter output signals, register means (39), feedforward update logic (38) for adjusting the equalizer coefficient signals to develop undated coefficient signals, a dual ported RAM (50) for storing a plurality of the equalizer coefficient signals, feedback logic (48) responsive to the linear filter output signals, equalizer coefficient signals obtained from the RAM, and train data signals, and operative to compute the equalizer error signals and equalizer output signals, feedback update logic (52) for adjusting the values of the coefficient signals for input back to the RAM as update signals, steady-state timing logic (54), and a controller (46) responsive to the polarity signals and the sync detect signals and operative to generate the train data signals and mode control signals for causing the equalizer apparatus to operate in either a set-up/test mode or a run mode, whereby read signals input from a storage media are sampled, amplified and digitally processed to decode stored information bits with the result that, as compared to prior art systems, storage density may be increased and error rate decreased.

摘要翻译： 用于处理存储在磁盘或磁带介质等上的信息的自适应判决反馈均衡器装置，包括数据输入缓冲器（34），增益获取电路（42），定时获取电路（40），用于产生定时误差信号， 输入到输入缓冲器的读取信号的采样相位，用于产生同步检测信号和极性信号的同步电路（44），用于产生线性滤波器输出信号的FIR滤波器（36），寄存器装置（39），前馈更新逻辑 38），用于调整均衡器系数信号以产生未标注的系数信号;双端口RAM（50），用于存储多个均衡器系数信号，响应于线性滤波器输出信号的反馈逻辑（48），从 RAM和训练数据信号，并且可操作以计算均衡器误差信号和均衡器输出信号，反馈更新逻辑（52）用于调整 用于作为更新信号输入到RAM的系数信号，稳态定时逻辑（54）和响应于极性信号和同步检测信号的控制器（46），并用于产生列车数据信号和模式控制信号 用于使均衡器装置在设置/测试模式或运行模式下操作，由此从存储介质输入的读取信号被采样，放大和数字处理以解码存储的信息位，结果是与之前的 艺术系统，存储密度可能会增加，错误率降低。

公开(公告)号：US20120093241A1

公开(公告)日：2012-04-19

申请号：US13273916

申请日：2011-10-14

申请人： Shailendra K. Singh ,  Kevin D. Fisher

发明人： Shailendra K. Singh ,  Kevin D. Fisher

IPC分类号： H04B15/00

CPC分类号： H04B15/00 ,  H04B3/32

摘要： Alien noise is removed from one or more receptor DSL lines after self-FEXT has been eliminated or reduced. Information about the alien noise in the form of slicer errors can be obtained from one or more donor DSL lines that may or may not be in the same domain (e.g., a vectored DSL system).

摘要翻译： 在自动FEXT被消除或减少之后，外部噪声从一个或多个受体DSL线路上移除。 关于限幅器错误形式的外来噪声的信息可以从一个或多个施主DSL线路获得，该线路可以是或不在同一域（例如矢量DSL系统）。

公开(公告)号：US20120020418A1

公开(公告)日：2012-01-26

申请号：US13189095

申请日：2011-07-22

申请人： Nicholas Philip Sands ,  Stephanie Felicia Pereira ,  Darren Bradley Hutchinson ,  Kevin D. Fisher ,  Amitkumar Mahadevan

发明人： Nicholas Philip Sands ,  Stephanie Felicia Pereira ,  Darren Bradley Hutchinson ,  Kevin D. Fisher ,  Amitkumar Mahadevan

IPC分类号： H04L27/00

CPC分类号： H04B3/32

摘要： The memory storage, transmission and processing demands of a vectored DSL system are reduced by sampling a subset of DSL tones in the DSL tone range used in the vectored system. This data is smoothed (denoised) to further reduce the data's size, sacrificing some fidelity or precision as a result. Finally, lossless entropy coding or the like is performed to encode the FEXT cancellation data for storage and use. The resulting data is less likely to cause transmission bottlenecks in the vectored system, can be stored and used more efficiently for both on-chip and off-chip vectoring implementations, and can be readily updated in various ways.

摘要翻译： 矢量DSL系统的存储器存储，传输和处理需求通过在矢量系统中使用的DSL音调范围中采样DSL音调的子集来减少。 该数据被平滑（去噪），以进一步减少数据的大小，从而牺牲一些保真度或精度。 最后，执行无损熵编码等以对用于存储和使用的FEXT取消数据进行编码。 所得到的数据不太可能导致向量系统中的传输瓶颈，可以在片上和片外向量实现方面更有效地存储和使用，并且可以以各种方式容易地更新。

公开(公告)号：US5600502A

公开(公告)日：1997-02-04

申请号：US600015

申请日：1995-09-15

申请人： Kevin D. Fisher

发明人： Kevin D. Fisher

IPC分类号： G11B5/012 ,  G11B5/09 ,  G11B20/10 ,  H04L7/04

CPC分类号： G11B5/012 ,  G11B20/10009 ,  G11B5/09 ,  H04L7/041

摘要： A method is provided for elimination of periodic inter symbol interference (ISI) resulting in timing phase steps and channel amplitude control steps occurring following a periodic preamble pattern, such as a 1/4 T sine wave pattern and at the beginning of a random pattern user data field in a partial response, maximum likelihood digital magnetic data storage channel. The method comprises the steps of: determining a periodicity of periodic ISI events in relation to main magnetic flux transitions during playback of a periodic signal waveform thereof, writing a new preamble field to the magnetic data storage channel of a periodic signal waveform preceding the user data field in which the phase of the periodic signal waveform is shifted, e.g. 180 degrees, at the determined periodicity of undershoot events, and locking a digital data sampling timing loop and a digital channel gain control circuit to the new preamble field, whereby undershoot-induced ISI timing phase steps and amplitude control steps at the preamble-to-user data field transition region are eliminated.

摘要翻译： 提供了一种用于消除周期性符号间干扰（ISI）的方法，其导致定时相位步骤和信道幅度控制步骤之后发生在诸如+ E，fra 1/4 + EE T正弦波模式的周期性前导码模式之后，并且在 部分响应中的随机模式用户数据字段的开始，最大似然数字磁数据存储信道。 该方法包括以下步骤：在重放其周期信号波形期间确定与主磁通转换相关的周期性ISI事件的周期性，将新的前导字段写入用户数据之前的周期信号波形的磁数据存储信道 周期信号波形的相位偏移的场，例如 180度，以确定的下冲事件的周期性，并将数字数据采样定时环和数字信道增益控制电路锁定到新的前同步码字段，由此在前同步码到帧的下行诱导的ISI定时相位步长和幅度控制步骤中， 用户数据字段过渡区域被消除。

公开(公告)号：US5576906A

公开(公告)日：1996-11-19

申请号：US320540

申请日：1994-10-11

申请人： Kevin D. Fisher ,  Jim Fitzpatrick ,  Xiaodong Che

发明人： Kevin D. Fisher ,  Jim Fitzpatrick ,  Xiaodong Che

IPC分类号： G11B5/596 ,  G11B21/10

CPC分类号： G11B5/59655

摘要： Synchronous detection of fine position servo burst information with a data transducer having an electrical width not less than about two-thirds a width of a data track within a partial response maximum likelihood (PRML) data channel is disclosed. The servo burst information is recorded on a storage medium as a pair or series of fractional-track-width sinewave concurrent burst patterns and includes an on-track phase generating a position error signal which varies linearly with head displacement about track centerline and at least one off-track phase generating a position error signal which varies linearly with head displacement about a position related to track boundary. The method includes steps of reading the on-track phase and the off-track phase with a head to provide an analog signal stream, amplifying and low pass filtering the signal stream to normalize gain of the signal stream, synchronously quantizing the signal stream to provide synchronous digital burst samples, multiplying the synchronous digital burst samples during servo sampling intervals by a normalization factor generated by a correlation signal generator to provide normalized samples, integrating normalized samples originating during the on-track phase to provide an on-track position error signal, and integrating normalized samples originating during the off-track phase to provide an off-track position error signal. Circuitry implementing the method including a discrete matched filter is also disclosed.

摘要翻译： 公开了具有不小于部分响应最大似然（PRML）数据信道内的数据轨道宽度的大约三分之二的数据换能器的精细位置伺服突发信息的同步检测。 伺服脉冲串信息作为一对或一系列分数轨道宽度正弦波同时脉冲串模式记录在存储介质上，并且包括轨道上相位，其产生与磁道中心线的磁头位移线性变化的位置误差信号，以及至少一个 偏离轨道相位产生与围绕与轨道边界相关的位置的磁头位移线性变化的位置误差信号。 该方法包括以头为单位读取轨道上相位和偏离轨相位的步骤，以提供模拟信号流，对信号流进行放大和低通滤波以对信号流的增益进行归一化，同步量化信号流以提供 同步数字脉冲串采样，在伺服采样间隔期间将同步数字脉冲串采样乘以由相关信号发生器产生的归一化因子，以提供归一化采样，将在轨道相位期间产生的归一化采样积分，以提供在轨位置误差信号， 并且在偏离轨道相位期间积分归一化样本以提供偏离位置误差信号。 还公开了实现包括离散匹配滤波器的方法的电路。

公开(公告)号：US5384671A

公开(公告)日：1995-01-24

申请号：US174895

申请日：1993-12-23

申请人： Kevin D. Fisher

发明人： Kevin D. Fisher

IPC分类号： G11B20/12 ,  G11B5/55 ,  G11B20/10 ,  G11B21/08 ,  G11B21/10 ,  G11B27/30 ,  G11B5/09

CPC分类号： G11B27/3027 ,  G11B20/10009 ,  G11B5/5526 ,  G11B20/1258 ,  G11B2220/20

摘要： A synchronous servo data detection subsystem for a PRML sampled data channel of a hard disk drive including a plurality of radially extending servo sectors embedded on a rotating data storage surface. Each servo sector includes a servo synchronization field, a synchronous servo address mark field, and fields providing coarse and fine head position information. A data head reads and writes data signals from and to the storage surface, and a voice coil actuator structure positions the head at each selected data track under control of a head position servo loop. The sampled data channel receives, synchronously samples and decodes analog signals into digital data. and reads the servo fields as the data head passes over each servo sector. The servo detection system includes a timing loop for synchronizing the sampled data channel to the servo synchronization field to provide synchronous samples from the servo sector, a synchronous servo address mark pattern detector connected to an output of the sampled data channel for detecting the unique recording pattern and for thereupon generating a servo address mark found signal, a synchronous coarse head position information detector connected to an output of the sampled data channel responsive to the address mark found signal for detecting and accumulating coarse bits comprising the coarse head position information, and a synchronous fine head position detector connected to the sampled data channel for detecting the fine head position information. Preferably, the synchronous servo address mark pattern bears low correlation to the synchronization field and to the position information fields.

摘要翻译： 一种用于包括嵌入在旋转数据存储表面上的多个径向延伸的伺服扇区的硬盘驱动器的PRML采样数据通道的同步伺服数据检测子系统。 每个伺服扇区包括伺服同步字段，同步伺服地址标志字段以及提供粗略和精细的头部位置信息的字段。 数据头从存储表面读取和写入数据信号，并且音圈致动器结构在头位置伺服环路的控制下将头部定位在每个选定的数据轨道处。 采样数据通道同步采样和解码模拟信号为数字数据。 并在数据头通过每个伺服扇区时读取伺服字段。 伺服检测系统包括用于将采样数据信道同步到伺服同步字段的定时环，以提供来自伺服扇区的同步采样，连接到采样数据信道的输出的同步伺服地址标记模式检测器，用于检测独特的记录模式 为了产生伺服地址标识发现信号，同步粗略头位置信息检测器响应于地址标识发现信号连接到采样数据信道的输出，用于检测和累加包括粗略头位置信息的粗略位，并且同步 连接到采样数据通道的精细头位置检测器用于检测细头位置信息。 优选地，同步伺服地址标志模式与同步字段和位置信息字段的相关性低。