公开(公告)号：US20230328957A1

公开(公告)日：2023-10-12

申请号：US17929422

申请日：2022-09-02

Applicant: Kioxia Corporation

Inventor： Masaya TODA ,  Tomoki ISHIMARU ,  Ha HOANG ,  Kota TAKAHASHI ,  Kazuhiro MATSUO ,  Takafumi OCHIAI ,  Shoji HONDA ,  Kenichiro TORATANI ,  Kiwamu SAKUMA ,  Taro SHIOKAWA ,  Mutsumi OKAJIMA

IPC: H01L27/108

CPC classification number: H01L27/10805

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.

公开(公告)号：US20220310612A1

公开(公告)日：2022-09-29

申请号：US17466573

申请日：2021-09-03

Applicant: Kioxia Corporation

Inventor： Mutsumi OKAJIMA

IPC: H01L27/108 ,  H01L29/24 ,  H01L21/02

Abstract: A semiconductor memory device includes a plurality of memory portions arranged in a first direction, a plurality of semiconductor layers arranged in the first direction and electrically connected to the plurality of memory portions respectively, a plurality of gate electrodes arranged in the first direction and opposed to the plurality of semiconductor layers respectively, a gate insulating film disposed between the plurality of semiconductor layers and the plurality of gate electrodes, a first wiring extending in the first direction and connected to the plurality of gate electrodes, and a plurality of second wirings arranged in the first direction and connected to the plurality of semiconductor layers respectively. The plurality of semiconductor layers are opposed to surfaces on one side and the other side of each of the plurality of gate electrodes in the first direction via the gate insulating film.

公开(公告)号：US20250095692A1

公开(公告)日：2025-03-20

申请号：US18884849

申请日：2024-09-13

Applicant: Kioxia Corporation

Inventor： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC: G11C5/06 ,  G11C11/22 ,  H10B51/10 ,  H10B51/20

Abstract: A semiconductor memory device includes: a first via-wiring extending in a first direction; first semiconductor layers arranged in the first direction and electrically connected to the first via-wiring; memory portions arranged in the first direction and electrically connected to the first semiconductor layers; first gate electrodes arranged in the first direction and opposed to the plurality of first semiconductor layers; first wirings arranged in the first direction and electrically connected to the plurality of first gate electrodes; second semiconductor layers arranged in the first direction and electrically connected to the first wirings; second gate electrodes arranged in the first direction and opposed to the second semiconductor layers; a second via-wiring extending in the first direction and electrically connected to the plurality of second gate electrodes; and second wirings arranged in the first direction and electrically connected to the second semiconductor layers.

公开(公告)号：US20240421071A1

公开(公告)日：2024-12-19

申请号：US18743245

申请日：2024-06-14

Applicant: Kioxia Corporation

Inventor： Ha HOANG ,  Kazuhiro MATSUO ,  Mutsumi OKAJIMA ,  Takamitsu OCHI ,  Tsuyoshi SUGISAKI ,  Isamu UJIIE

IPC: H01L23/522 ,  G11C5/06 ,  H01L23/528 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10 ,  H10B43/27

Abstract: A semiconductor memory device includes a plurality of memory layers arranged in a first direction, a first via-wiring extending in the first direction, a second via-wiring in a position different from a position of the first via-wiring in a second direction and extending in the first direction. One of the plurality of memory layers includes a first wiring disposed between the first and the second via-wiring and extending in a third direction, a first semiconductor layer electrically connected to the first via-wiring, a first gate electrode opposed to the first semiconductor layer and electrically connected to the first wiring, a first memory portion electrically connected to the first semiconductor layer, a second semiconductor layer electrically connected to the second via-wiring, a second gate electrode opposed to the second semiconductor layer and electrically connected to the first wiring, and a second memory portion electrically connected to the second semiconductor layer.

公开(公告)号：US20240081042A1

公开(公告)日：2024-03-07

申请号：US18459978

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC: H10B12/00

CPC classification number: H10B12/30 ,  H10B12/02

Abstract: A semiconductor memory device comprises: a first memory layer; and a first via wiring and a second via wiring extending in a first direction, and having different positions from each other in a second direction. The first memory layer comprises: a first transistor electrically connected to the first via wiring; a memory portion electrically connected to the first transistor; a first wiring electrically connected to the first transistor; a second transistor electrically connected to the second via wiring and the first wiring; a first electrode electrically connected to the second transistor; and a second electrode electrically connected to the first wiring and first electrode. A length of the second electrode in the first direction is larger than one or both of a length of the first wiring in the first direction and a length of the first conductive layer in the first direction.

公开(公告)号：US20230309321A1

公开(公告)日：2023-09-28

申请号：US17898255

申请日：2022-08-29

Applicant: KIOXIA CORPORATION

Inventor： Naoharu SHIMOMURA ,  Tsuyoshi KONDO ,  Yoshihiro UEDA ,  Yasuaki OOTERA ,  Akihito YAMAMOTO ,  Mutsumi OKAJIMA ,  Masaki KADO ,  Tsutomu NAKANISHI ,  Nobuyuki UMETSU ,  Michael Arnaud QUINSAT

IPC: H01L27/22 ,  H01L43/02

CPC classification number: H01L27/228 ,  H01L43/02

Abstract: A magnetic memory includes first magnetic members extending along a first direction. First and second wirings are spaced apart from the first magnetic members on a second end side of the first magnetic members. At least one of the first magnetic members is between the first and second wirings in a plan view from the first direction. A second magnetic member has a first portion facing the first wiring and electrically connected to a first magnetic member on one side and a second portion facing the first wiring on an opposite side. The second portion is electrically connected to another first magnetic member. A control circuit causes a current to flow through one of the first wiring or the second wiring when data is written into the first magnetic member that is between the first wiring and the second wiring.

公开(公告)号：US20230309294A1

公开(公告)日：2023-09-28

申请号：US17901772

申请日：2022-09-01

Applicant: Kioxia Corporation

Inventor： Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA ,  Kotaro NODA ,  Takanori AKITA

IPC: H01L27/108

CPC classification number: H01L27/1082 ,  H01L27/10897 ,  H01L27/10873

Abstract: A semiconductor device includes: an oxide semiconductor layer extending in a first direction; a gate electrode overlapping the oxide semiconductor layer in a second direction intersecting the first direction; a gate insulating film provided between the gate electrode and the oxide semiconductor layer; a first conductive layer provided on the oxide semiconductor layer in the first direction and containing a conductive oxide; a second conductive layer provided on the first conductive layer in the first direction and containing a metal element; a first protective film in contact with a side surface of the second conductive layer; and a second protective film in contact with at least a part of a side surface or an upper surface of the first conductive layer. The first protective film and the second protective film each contain a material having an oxygen diffusion coefficient smaller than that of the second conductive layer.

公开(公告)号：US20220406363A1

公开(公告)日：2022-12-22

申请号：US17549262

申请日：2021-12-13

Applicant: Kioxia Corporation

Inventor： Mutsumi OKAJIMA ,  Mamoru ISHIZAKA

IPC: G11C11/4091 ,  G11C5/02 ,  H01L23/48

Abstract: A semiconductor memory device includes: memory units arranged in a first direction; first semiconductor layers arranged in the first direction and electrically connected to the memory units; first gate electrodes arranged in the first direction and opposed to the first semiconductor layers; a first wiring extending in the first direction and connected to the first semiconductor layers; second wirings arranged in the first direction, and connected to the first gate electrodes; second semiconductor layers arranged in the first direction and disposed at first end portions of the second wirings; second gate electrodes arranged in the first direction and opposed to the second semiconductor layers; third semiconductor layers arranged in the first direction and disposed at second end portions of the second wirings; and third gate electrodes arranged in the first direction and opposed to the third semiconductor layers.

公开(公告)号：US20220302208A1

公开(公告)日：2022-09-22

申请号：US17467095

申请日：2021-09-03

Applicant: Kioxia Corporation

Inventor： Tsutomu NAKANISHI ,  Yasuaki OOTERA ,  Nobuyuki UMETSU ,  Michael Arnaud QUINSAT ,  Masaki KADO ,  Susumu HASHIMOTO ,  Shiho NAKAMURA ,  Naoharu SHIMOMURA ,  Tsuyoshi KONDO ,  Mutsumi OKAJIMA

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A storage device includes: a memory unit and a first pillar. The first pillar includes: a first region having a third portion between a first and a second portion respectively having a first and a second maximum diameter, and having a first minimum diameter, the first and second portions defining a first distance; a second region having a sixth portion between a fourth and a fifth portion respectively having a third and a fourth maximum diameter, and having a second minimum diameter, the fourth and fifth portions defining a second distance; and a third region between the first and second regions, having a ninth portion between a seventh and an eighth portion respectively having a fifth and a sixth maximum diameter, and having a third minimum diameter, the seventh and eighth portions defining a third distance shorter than each of the first and second distances.

公开(公告)号：US20210313340A1

公开(公告)日：2021-10-07

申请号：US17349126

申请日：2021-06-16

Applicant: Kioxia Corporation

Inventor： Mutsumi OKAJIMA

IPC: H01L27/11568 ,  H01L27/11565 ,  H01L27/11578

Abstract: A memory device includes a first conductor and a charge storage film extending along a first direction; a first semiconductor of a first conductive type; a second and third semiconductor each of a second conductive type; and a stack comprising a second conductor, a first insulator, and a third conductor sequentially stacked along the first direction and each extending along a second direction. The first conductor, the charge storage film, the first semiconductor, and the stack are arranged in this order along a third direction. The second semiconductor is in contact with the first semiconductor and the second conductor, between the second conductor or the first insulator and the charge storage film.