公开(公告)号：US20070252173A1

公开(公告)日：2007-11-01

申请号：US11790791

申请日：2007-04-27

申请人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

发明人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

IPC分类号： H01L29/739

CPC分类号： H01L29/0847 ,  H01L29/1033 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/4916 ,  H01L29/66068 ,  H01L29/7828

摘要： A semiconductor device is provided with: a semiconductor substrate of a predetermined electroconduction type; a hetero semiconductor region contacted with a first main surface of the semiconductor substrate and comprising a semiconductor material having a bandgap different from that of the semiconductor substrate; a gate electrode formed through a gate insulator layer at a position adjacent to a junction region between the hetero semiconductor region and the semiconductor substrate; a source electrode connected to the hetero semiconductor region; and a drain electrode connected to the semiconductor substrate; wherein the hetero semiconductor region includes a contact portion contacted with the source electrode, at least a partial region of the contact portion is of the same electroconduction type as the electroconduction type of the semiconductor substrate, and the partial region has an impurity concentration higher than an impurity concentration of at least that partial region of a gate-electrode facing portion in the hetero semiconductor region which is positioned to face toward the gate electrode through the gate insulator layer.

摘要翻译： 半导体器件具有：预定的导电型的半导体衬底; 与所述半导体衬底的第一主表面接触并且包括具有与所述半导体衬底的带隙不同的带隙的半导体材料的异质半导体区域; 在与所述异质半导体区域和所述半导体基板之间的接合区域相邻的位置处形成的栅极电极， 连接到所述异质半导体区的源电极; 和连接到半导体衬底的漏电极; 其中所述异质半导体区域包括与所述源电极接触的接触部分，所述接触部分的至少一部分区域具有与所述半导体衬底的导电型相同的导电类型，并且所述部分区域的杂质浓度高于 至少通过栅极绝缘体层位于面向栅电极的异质半导体区域中的栅电极面对部分的部分区域的杂质浓度。

公开(公告)号：US20070252171A1

公开(公告)日：2007-11-01

申请号：US11790679

申请日：2007-04-26

申请人： Shigeharu Yamagami ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Tetsuya Hayashi ,  Hideaki Tanaka

发明人： Shigeharu Yamagami ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Tetsuya Hayashi ,  Hideaki Tanaka

IPC分类号： H01L29/732

CPC分类号： H01L29/8613 ,  H01L21/0465 ,  H01L21/0475 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/6606 ,  H01L29/66136

摘要： As semiconductor regions in contact with a first main surface of a semiconductor base composed by forming an N− silicon carbide epitaxial layer on an N+ silicon carbide substrate connected to a cathode electrode, there are provided both of an N+ polycrystalline silicon layer of a same conduction type as a conduction type of the semiconductor base and a P+ polycrystalline silicon layer of a conduction type different from the conduction type of the semiconductor base. Both of the N+ polycrystalline silicon layer and the P+ polycrystalline silicon layer are hetero-joined to the semiconductor base, and are ohmically connected to the anode electrode. Moreover, the N+ polycrystalline silicon layer of the same conduction type as the conduction type of the semiconductor base is formed so as to contact the first main surface of the semiconductor base, and the P+ polycrystalline silicon layer of the conduction type different from the conduction type of the semiconductor base is formed in trenches dug on the first main surface of the semiconductor base.

摘要翻译： 作为与通过在与阴极连接的N +碳化硅衬底上形成N-碳化硅外延层而构成的半导体衬底的第一主表面接触的半导体区域，提供了具有相同导电性的N +多晶硅层 类型为半导体基底的导电类型和不同于半导体基底的导电类型的导电类型的P +多晶硅层。 N +多晶硅层和P +多晶硅层都与半导体基体异相接合，并与欧姆连接到阳极电极。 此外，形成与半导体基底的导电类型相同的导电类型的N +多晶硅层，以便与半导体基底的第一主表面接触，并且与导电类型不同的导电类型的P +多晶硅层 形成在半导体基底的第一主表面上的沟槽中。

公开(公告)号：US20070252168A1

公开(公告)日：2007-11-01

申请号：US11790792

申请日：2007-04-27

申请人： Yoshio Shimoida ,  Masakatsu Hoshi ,  Tetsuya Hayashi ,  Hideaki Tanaka ,  Shigeharu Yamagami

发明人： Yoshio Shimoida ,  Masakatsu Hoshi ,  Tetsuya Hayashi ,  Hideaki Tanaka ,  Shigeharu Yamagami

IPC分类号： H01L29/74

CPC分类号： H01L27/0255 ,  H01L28/20 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/267 ,  H01L29/66068 ,  H01L29/7828 ,  H01L29/866

摘要： An electrostatic discharge protection element and a protection resistor, which are formed on an N-drain region with a field oxide film interposed therebetween for the purpose of preventing electrical breakdown of a field effect transistor, are composed as a stacked bidirectional Zener diode of one or a plurality of N+ polycrystalline silicon regions of a first layer and a P+ polycrystalline silicon region of a second layer, and a stacked resistor of one or a plurality of N+ resistor layers of the first layer and an N+ resistor layer of the second layer, respectively. One end of the plurality of N+ polycrystalline silicon regions of the first layer is connected to an external gate electrode terminal, and the other end is connected to a source electrode. One end of the plurality of N+ resistor layers of the first layer is connected to a gate electrode, and the other end is connected to the external gate electrode terminal. Semiconductor regions of the first layer and the second layer are formed by using semiconductor films, which form a hetero semiconductor region and the gate electrode, respectively.

摘要翻译： 为了防止场效应晶体管的电击穿，形成在其间具有场氧化膜的N-drain区域上的静电放电保护元件和保护电阻器被构成为一个或多个的叠层双向齐纳二极管， 第一层的多个N +多晶硅区域和第二层的P +多晶硅区域，以及第一层的一个或多个N +电阻层和第二层的N +电阻层的层叠电阻器 。 第一层的多个N +多晶硅区域的一端连接到外部栅电极端子，另一端与源电极连接。 第一层的多个N +电阻层的一端连接到栅电极，另一端连接到外部栅电极端子。 通过使用分别形成杂半导体区域和栅电极的半导体膜来形成第一层和第二层的半导体区域。

公开(公告)号：US07183575B2

公开(公告)日：2007-02-27

申请号：US10368016

申请日：2003-02-19

申请人： Yoshio Shimoida ,  Saichirou Kaneko ,  Hideaki Tanaka ,  Masakatsu Hoshi ,  Kraisom Throngnumchai ,  Teruyoshi Mihara ,  Tetsuya Hayashi

发明人： Yoshio Shimoida ,  Saichirou Kaneko ,  Hideaki Tanaka ,  Masakatsu Hoshi ,  Kraisom Throngnumchai ,  Teruyoshi Mihara ,  Tetsuya Hayashi

IPC分类号： H01L29/15

CPC分类号： H01L29/267 ,  H01L29/1608 ,  H01L29/861

摘要： A high reverse voltage diode includes a hetero junction made up from a silicon carbide base layer, which constitutes a first semiconductor base layer, and a polycrystalline silicon layer, which constitutes a second semiconductor layer, and whose band gap is different from that of the silicon carbide base layer. A low concentration N type polycrystalline silicon layer is deposited on a first main surface side of the silicon carbide base layer, and a metal electrode is formed on a second main surface side of the silicon carbide base layer which is opposite to the first main surface side thereof.

摘要翻译： 高反向电压二极管包括由构成第一半导体基底层的碳化硅基底层和构成第二半导体层的多晶硅层构成的异质结，并且其带隙与硅的带隙不同 碳化物基层。 在碳化硅基底层的第一主表面侧沉积低浓度N型多晶硅层，在与第一主表面侧相反的碳化硅基底层的第二主表面侧上形成金属电极 其中。

公开(公告)号：US10177387B2

公开(公告)日：2019-01-08

申请号：US14880815

申请日：2015-10-12

申请人： Kazuki Miyatake ,  Kenji Hosaka ,  Yoshio Shimoida ,  Hideaki Horie

发明人： Kazuki Miyatake ,  Kenji Hosaka ,  Yoshio Shimoida ,  Hideaki Horie

IPC分类号： H01M4/66 ,  H01M2/34 ,  H01M10/637 ,  H01M10/654 ,  H01M10/613 ,  H01M4/80 ,  H01M10/647 ,  H01M4/02

摘要： Provided is a bipolar battery current collector that includes a conductive resin layer formed in such a manner as to, when at least part of the conductive resin layer reaches a predetermined temperature, interrupts a flow of electric current through the at least part of the conductive resin layer in a vertical direction thereof. Also provided is a bipolar battery using the current collector. It is possible by the use of the current collector to suppress local heat generation in the bipolar battery and improve the durability of the bipolar battery.

公开(公告)号：US09236746B2

公开(公告)日：2016-01-12

申请号：US13812295

申请日：2011-08-03

申请人： Yukinari Kato ,  Takaaki Abe ,  Yasuhito Miyazaki ,  Yoshio Shimoida

发明人： Yukinari Kato ,  Takaaki Abe ,  Yasuhito Miyazaki ,  Yoshio Shimoida

IPC分类号： H02J7/00 ,  H01M10/44 ,  H01M10/48 ,  H01M10/052 ,  H01M10/04

CPC分类号： H02J7/00 ,  H01M10/0418 ,  H01M10/052 ,  H01M10/441 ,  H01M10/482 ,  H02J7/0021

摘要： A battery control device is provided that uses a discharge to adjust the capacitance of cells that form a bipolar battery and calculates the voltage increase value of the remaining cells that do not discharge to adjust capacitance if one or more cells, among all of the cells that form the bipolar battery, are discharged to adjust capacitance in a battery control device that controls voltage dispersion or volume dispersion between cells that form the bipolar battery; and setting the general discharge value when there is a discharge to adjust capacitance on the basis of the result of the voltage increase value calculation.

摘要翻译： 提供一种电池控制装置，其使用放电来调节形成双极电池的电池的电容，并计算不放电的剩余电池的电压增加值，以便在所有电池中的一个或多个电池中调节电容 形成双极电池，放电以调节电池控制装置中的电容，其控制形成双极电池的电池之间的电压分散或体积分散; 并且根据电压增加值计算的结果，当放电进行调整电容时设定一般放电值。

公开(公告)号：US08441036B2

公开(公告)日：2013-05-14

申请号：US11724389

申请日：2007-03-15

申请人： Yoshio Shimoida ,  Tetsuya Hayashi ,  Hideaki Tanaka ,  Shigeharu Yamagami ,  Masakatsu Hoshi

发明人： Yoshio Shimoida ,  Tetsuya Hayashi ,  Hideaki Tanaka ,  Shigeharu Yamagami ,  Masakatsu Hoshi

IPC分类号： H01L29/739

CPC分类号： H01L29/7828 ,  H01L21/0273 ,  H01L21/32139 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/4236 ,  H01L29/66068

摘要： A trench is formed extending from a surface of a hetero semiconductor region of a polycrystal silicon to the drain region. Further, a driving point of the field effect transistor, where a gate insulating film, the hetero semiconductor region and the drain region are adjoined, is formed at a position spaced apart from a side wall of the trench.

摘要翻译： 形成从多晶硅的异质半导体区域的表面延伸到漏极区域的沟槽。 此外，栅极绝缘膜，异质半导体区域和漏极区域相邻的场效应晶体管的驱动点形成在与沟槽的侧壁间隔开的位置处。

公开(公告)号：US08164116B2

公开(公告)日：2012-04-24

申请号：US12065847

申请日：2006-08-22

申请人： Tetsuya Hayashi ,  Yoshio Shimoida ,  Masakatsu Hoshi ,  Hideaki Tanaka ,  Shigeharu Yamagami

发明人： Tetsuya Hayashi ,  Yoshio Shimoida ,  Masakatsu Hoshi ,  Hideaki Tanaka ,  Shigeharu Yamagami

IPC分类号： H01L29/66

CPC分类号： H01L29/861 ,  H01L21/046 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7828

摘要： A semiconductor device includes: a semiconductor base; a hetero semiconductor region which is in contact with the semiconductor base and which has a band gap different from that of the semiconductor base; a first electrode connected to the hetero semiconductor region; and a second electrode forming an ohmic contact to the semiconductor base. The hetero semiconductor region includes a laminated hetero semiconductor region formed by laminating a plurality of semiconductor layers in which crystal alignment is discontinuous at a boundary between at least two layers.

摘要翻译： 半导体器件包括：半导体基底; 与半导体基底接触并且具有与半导体基底不同的带隙的异质半导体区域; 连接到所述异质半导体区域的第一电极; 以及形成与半导体基底的欧姆接触的第二电极。 异质半导体区域包括通过层叠在至少两层之间的边界处晶体取向不连续的多个半导体层而形成的层叠异质半导体区域。

公开(公告)号：US20110305948A1

公开(公告)日：2011-12-15

申请号：US13202635

申请日：2010-01-28

申请人： Kazuki Miyatake ,  Kenji Hosaka ,  Yoshio Shimoida ,  Hideaki Horie

发明人： Kazuki Miyatake ,  Kenji Hosaka ,  Yoshio Shimoida ,  Hideaki Horie

IPC分类号： H01M4/80 ,  C08G75/06 ,  H01B1/24 ,  C08G73/02 ,  C08F38/02 ,  H01B1/12 ,  H01M4/66 ,  C08G73/06

CPC分类号： H01M4/668 ,  H01M2/348 ,  H01M4/66 ,  H01M4/663 ,  H01M4/666 ,  H01M4/80 ,  H01M10/613 ,  H01M10/637 ,  H01M10/647 ,  H01M10/654 ,  H01M2004/029 ,  H01M2200/10 ,  H01M2200/106

摘要： Provided is a bipolar battery current collector that includes a conductive resin layer formed in such a manner as to, when at least part of the conductive resin layer reaches a predetermined temperature, interrupts a flow of electric current through the at least part of the conductive resin layer in a vertical direction thereof. Also provided is a bipolar battery using the current collector. It is possible by the use of the current collector to suppress local heat generation in the bipolar battery and improve the durability of the bipolar battery.

摘要翻译： 提供一种双极电池集电体，其包括导电性树脂层，所述导电性树脂层以至少一部分导电性树脂层达到规定温度的方式形成，从而中断通过所述导电性树脂的至少一部分的电流 层。 还提供了使用集电器的双极电池。 通过使用集电体可以抑制双极型电池的局部发热，提高双极型电池的耐久性。

公开(公告)号：US20110117699A1

公开(公告)日：2011-05-19

申请号：US13014190

申请日：2011-01-26

申请人： Tetsuya HAYASHI ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

发明人： Tetsuya HAYASHI ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

IPC分类号： H01L21/336 ,  H01L21/04

CPC分类号： H01L29/7828 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/66068

摘要： A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.

摘要翻译： 制备由半导体材料制成的半导体衬底，并且在半导体衬底上形成异质半导体区域，以在异质半导体区域和半导体衬底之间的界面中形成异质结。 异质半导体区域由具有与半导体材料的带隙不同的带隙的半导体材料制成，并且异质半导体区域的一部分包括膜厚度比其他部分薄的膜厚控制部分。 通过以等于膜厚控制部分的膜厚的厚度氧化杂半导体区域，形成与异质结相邻的栅极绝缘膜。 在栅极绝缘膜上形成栅电极。 这使得可以制造包括具有较低导通电阻的栅极绝缘膜以及更高的绝缘特性和可靠性的半导体器件。