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    Semiconductor memory device including recessed control gate electrode
    11.
    发明授权
    Semiconductor memory device including recessed control gate electrode 失效
    半导体存储器件包括凹入控制栅电极

    公开(公告)号：US07732855B2

    公开(公告)日：2010-06-08

    申请号：US11808982

    申请日：2007-06-14

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    IPC分类号： H01L21/28

    CPC分类号： H01L29/42324 ,  G11C16/0408 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42336 ,  H01L29/4234 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792

    摘要： A semiconductor memory device may include a semiconductor substrate, at least one control gate electrode, at least one storage node layer, at least one tunneling insulating layer, at least one blocking insulating layer, and/or first and second channel regions. The at least one control gate electrode may be recessed into the semiconductor substrate. The at least one storage node layer may be between a sidewall of the at least one control gate electrode and the semiconductor substrate. The at least one tunneling insulating layer may be between the at least one storage node layer and the at least one control gate electrode. The at least one blocking insulating layer may be between the storage node layer and the control gate electrode. The first and second channel regions may be between the at least one tunneling insulating layer and the semiconductor substrate to surround at least a portion of the sidewall of the control gate electrode and/or may be separated from each other.

    摘要翻译： 半导体存储器件可以包括半导体衬底，至少一个控制栅电极，至少一个存储节点层，至少一个隧道绝缘层，至少一个阻挡绝缘层和/或第一和第二沟道区。 至少一个控制栅电极可以凹进到半导体衬底中。 所述至少一个存储节点层可以在所述至少一个控制栅电极的侧壁和所述半导体衬底之间。 所述至少一个隧道绝缘层可以在所述至少一个存储节点层和所述至少一个控制栅电极之间。 所述至少一个阻挡绝缘层可以在所述存储节点层和所述控制栅电极之间。 第一和第二沟道区可以在至少一个隧道绝缘层和半导体衬底之间，以围绕控制栅电极的侧壁的至少一部分和/或可以彼此分离。

    Non-volatile memory device and method of manufacturing same
    12.
    发明申请
    Non-volatile memory device and method of manufacturing same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20100044778A1

    公开(公告)日：2010-02-25

    申请号：US12461416

    申请日：2009-08-11

    申请人： Kwang-soo Seol ,  Yoon-dong Park

    发明人： Kwang-soo Seol ,  Yoon-dong Park

    IPC分类号： H01L29/792 ,  H01L21/20 ,  H01L21/28

    CPC分类号： H01L27/11578 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

    摘要： A non-volatile memory device and a method of manufacturing the non-volatile memory device are provided. At least one first semiconductor layer and at least one second semiconductor layer are disposed. At least one control gate electrode is disposed between the at least one first semiconductor layer and the at least one second semiconductor layer. At least one first layer selection line is capacitively coupled to the at least one first semiconductor layer. At least one second layer selection line is capacitively coupled to the at least one second semiconductor layer.

    摘要翻译： 提供了一种非易失性存储器件和制造该非易失性存储器件的方法。 设置至少一个第一半导体层和至少一个第二半导体层。 至少一个控制栅电极设置在至少一个第一半导体层和至少一个第二半导体层之间。 至少一个第一层选择线电容耦合到至少一个第一半导体层。 至少一个第二层选择线电容耦合到至少一个第二半导体层。

    Image sensor using photo-detecting molecule and method of operating the same
    13.
    发明申请
    Image sensor using photo-detecting molecule and method of operating the same 有权
    使用光检测分子的图像传感器及其操作方法

    公开(公告)号：US20090294633A1

    公开(公告)日：2009-12-03

    申请号：US12385122

    申请日：2009-03-31

    申请人： Kwang-soo Seol ,  Yoon-dong Park

    发明人： Kwang-soo Seol ,  Yoon-dong Park

    IPC分类号： H01L27/146 ,  H01L31/0256 ,  H01L51/46

    CPC分类号： H01L27/14603 ,  H01L27/14627 ,  H01L27/307 ,  H01L51/0043 ,  H01L51/0073 ,  H01L51/424 ,  H01L51/4246 ,  Y02E10/549

    摘要： Provided is an image sensor using a photo-detecting molecule and a method of operating the image sensor. The image sensor may include a plurality of first electrodes disposed parallel to each other and a plurality of second electrodes disposed parallel to each other in a direction perpendicular to the first electrodes and above the first electrodes, and a plurality of subpixels formed in regions where the first electrodes cross the second electrodes. Each of the subpixels may comprise a photo-detecting molecule layer that may generate charges by absorbing light having a certain wavelength, a charge generation layer that may form a plurality of secondary electrons by receiving the charges from the photo-detecting molecule layer when a known voltage is applied between the first electrodes and the second electrodes, and a variable resistance layer, an electrical state of which is changed by receiving the secondary electrons generated from the charge generation layer.

    摘要翻译： 提供了使用光检测分子的图像传感器和操作图像传感器的方法。 图像传感器可以包括彼此平行设置的多个第一电极和在垂直于第一电极并且在第一电极上方彼此平行设置的多个第二电极，以及多个子像素，其形成在 第一电极与第二电极交叉。 每个子像素可以包括可以通过吸收具有一定波长的光而产生电荷的光检测分子层，电荷产生层可以通过从已知的光检测分子层接收电荷而形成多个二次电子 在第一电极和第二电极之间施加电压，并且通过接收从电荷产生层产生的二次电子而改变其电状态的可变电阻层。

    Method for reducing lateral movement of charges and memory device thereof
    16.
    发明授权
    Method for reducing lateral movement of charges and memory device thereof 有权
    减少电荷横向运动的方法及其记忆装置

    公开(公告)号：US07929351B2

    公开(公告)日：2011-04-19

    申请号：US12382790

    申请日：2009-03-24

    申请人： Kwang-soo Seol ,  Young-gu Jin ,  Yoon-dong Park

    发明人： Kwang-soo Seol ,  Young-gu Jin ,  Yoon-dong Park

    IPC分类号： G11C11/34

    CPC分类号： G11C16/10 ,  G11C16/3409 ,  G11C16/344 ,  G11C16/3454

    摘要： Provided is a method and device for reducing lateral movement of charges. The method may include pre-programming at least one memory cell that is in an erased state by applying a pre-programming voltage to the at least one memory cell to have a narrower distribution of threshold voltages than the at least one erased state memory cell and verifying that the pre-programmed memory cell is in the pre-programmed state using a negative effective verifying voltage.

    摘要翻译： 提供一种用于减少电荷的横向移动的方法和装置。 该方法可以包括通过对至少一个存储器单元施加预编程电压以使得具有比所述至少一个擦除状态存储器单元更窄的阈值电压分布来对处于擦除状态的至少一个存储器单元进行预编程，以及 使用负的有效验证电压来验证预编程存储器单元是否处于预编程状态。

    Semiconductor memory device including recessed control gate electrode
    18.
    发明申请
    Semiconductor memory device including recessed control gate electrode 失效
    半导体存储器件包括凹入控制栅电极

    公开(公告)号：US20080093662A1

    公开(公告)日：2008-04-24

    申请号：US11808982

    申请日：2007-06-14

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42324 ,  G11C16/0408 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42336 ,  H01L29/4234 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792

    摘要： A semiconductor memory device may include a semiconductor substrate, at least one control gate electrode, at least one storage node layer, at least one tunneling insulating layer, at least one blocking insulating layer, and/or first and second channel regions. The at least one control gate electrode may be recessed into the semiconductor substrate. The at least one storage node layer may be between a sidewall of the at least one control gate electrode and the semiconductor substrate. The at least one tunneling insulating layer may be between the at least one storage node layer and the at least one control gate electrode. The at least one blocking insulating layer may be between the storage node layer and the control gate electrode. The first and second channel regions may be between the at least one tunneling insulating layer and the semiconductor substrate to surround at least a portion of the sidewall of the control gate electrode and/or may be separated from each other.

    摘要翻译： 半导体存储器件可以包括半导体衬底，至少一个控制栅电极，至少一个存储节点层，至少一个隧道绝缘层，至少一个阻挡绝缘层和/或第一和第二沟道区。 至少一个控制栅电极可以凹进到半导体衬底中。 所述至少一个存储节点层可以在所述至少一个控制栅电极的侧壁和所述半导体衬底之间。 所述至少一个隧道绝缘层可以在所述至少一个存储节点层和所述至少一个控制栅电极之间。 所述至少一个阻挡绝缘层可以在所述存储节点层和所述控制栅电极之间。 第一和第二沟道区可以在至少一个隧道绝缘层和半导体衬底之间，以围绕控制栅电极的侧壁的至少一部分和/或可以彼此分离。

    Nonvolatile Memory Devices Having Memory Cell Transistors Therein with Lower Bandgap Source/Drain Regions
    19.
    发明申请
    Nonvolatile Memory Devices Having Memory Cell Transistors Therein with Lower Bandgap Source/Drain Regions 有权
    具有存储单元晶体管的非易失性存储器件具有较低的带隙源/漏区

    公开(公告)号：US20110233610A1

    公开(公告)日：2011-09-29

    申请号：US12974542

    申请日：2010-12-21

    申请人： Byung-kyu Cho ,  Kwang-soo Seol ,  Sung-hoi Hur ,  Jung-dal Choi

    发明人： Byung-kyu Cho ,  Kwang-soo Seol ,  Sung-hoi Hur ,  Jung-dal Choi

    IPC分类号： H01L29/772

    CPC分类号： H01L27/11521 ,  H01L27/11524

    摘要： Nonvolatile memory devices include a plurality of nonvolatile memory cell transistors having respective channel regions within a semiconductor layer formed of a first semiconductor material and respective source/drain regions formed of a second semiconductor material, which has a smaller bandgap relative to the first semiconductor material. The source/drain regions can form non-rectifying junctions with the channel regions. The source/drain regions may include germanium (e.g., Ge or SiGe regions), the semiconductor layer may be a P-type silicon layer and the source/drain regions of the plurality of nonvolatile memory cell transistors may be P-type germanium or P-type silicon germanium.

    摘要翻译： 非易失性存储器件包括多个非易失性存储单元晶体管，其在由第一半导体材料形成的半导体层内的相应沟道区和由第二半导体材料形成的相应的源极/漏极区相互相对于第一半导体材料具有较小的带隙。 源极/漏极区域可以与沟道区域形成非整流结。 源极/漏极区域可以包括锗（例如Ge或SiGe区域），半导体层可以是P型硅层，并且多个非易失性存储单元晶体管的源极/漏极区域可以是P型锗或P 型硅锗。