公开(公告)号：US06540841B1

公开(公告)日：2003-04-01

申请号：US09607284

申请日：2000-06-30

申请人： Sudipto Ranendra Roy ,  Subhash Gupta ,  Simon Chooi ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Paul Kwok Keung Ho

发明人： Sudipto Ranendra Roy ,  Subhash Gupta ,  Simon Chooi ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Paul Kwok Keung Ho

IPC分类号： B08B700

CPC分类号： B08B1/04 ,  B08B3/04

摘要： A new method and apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.

摘要翻译： 提供了可用于清洁半导体衬底的外边缘的新方法和装置。 在本发明的第一实施例中，刷子安装在基板周围的基板的表面上，化学品通过其上安装有清洁刷的中空芯被供给到待清洁的表面。 待清洁的表面以相对高的速度旋转，从而使沉积在该表面（由刷子）上的化学物质残留在表面的边缘。 在本发明的第二实施例中，多孔辊安装在化学容器和待清洁的表面之间，待清洁的表面以相对较高的速度旋转。 因此，由界面多孔辊沉积在待清洗的表面上的化学物质保留在该表面的边缘，从而引起表面边缘的最佳清洁作用。 污染物以这种方式从表面除去后，可以通过加入去离子水进一步清洁表面。

公开(公告)号：US06358821B1

公开(公告)日：2002-03-19

申请号：US09619376

申请日：2000-07-19

申请人： Subhash Gupta ,  Simon Chooi ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono

发明人： Subhash Gupta ,  Simon Chooi ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono

IPC分类号： H01L2122

CPC分类号： H01L21/3221 ,  C23C14/165 ,  H01L21/2885

摘要： A method of preventing copper transport on a semiconductor wafer, comprising the following steps. A semiconductor wafer having a front side and a backside is provided. Metal, selected from the group comprising aluminum, aluminum-copper, aluminum-silicon, and aluminum-copper-silicon is sputtered on the backside of the wafer to form a layer of metal. The back side sputtered aluminum layer may be partially oxidized at low temperature to further decrease the copper penetration possibility and to also provide greater flexibility in subsequent copper interconnect related processing. Once the back side layer is in place, the wafer can be processed as usual. The sputtered back side aluminum layer can be removed during final backside grinding.

摘要翻译： 一种防止半导体晶片上的铜传输的方法，包括以下步骤。 提供具有正面和背面的半导体晶片。 从包括铝，铝 - 铜，铝 - 硅和铝 - 铜 - 硅的组中选择的金属溅射在晶片的背面以形成一层金属。 背面溅射的铝层可以在低温下部分氧化，以进一步降低铜的渗透可能性，并且在随后的铜互连相关处理中也提供更大的灵活性。 一旦背面层就位，就可以照常处理晶片。 最后的背面研磨可以除去溅射的背面铝层。

公开(公告)号：US06813796B2

公开(公告)日：2004-11-09

申请号：US10357137

申请日：2003-02-03

申请人： Sudipto Ranendra Roy ,  Subhash Gupta ,  Simon Chooi ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Paul Kwok Keung Ho

发明人： Sudipto Ranendra Roy ,  Subhash Gupta ,  Simon Chooi ,  Xu Yi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Paul Kwok Keung Ho

IPC分类号： B08B700

CPC分类号： B08B1/04 ,  B08B3/04

摘要： A new apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.

摘要翻译： 提供了可用于清洁半导体衬底的外边缘的新设备。 在本发明的第一实施例中，刷子安装在基板周围的基板的表面上，化学品通过其上安装有清洁刷的中空芯被供给到被清洁的表面。 待清洁的表面以相对高的速度旋转，从而使沉积在该表面（由刷子）上的化学物质残留在表面的边缘。 在本发明的第二实施例中，多孔辊安装在化学容器和待清洁的表面之间，待清洁的表面以相对较高的速度旋转。 因此，由界面多孔辊沉积在待清洗的表面上的化学物质保留在该表面的边缘，从而引起表面边缘的最佳清洁作用。 污染物以这种方式从表面除去后，可以通过加入去离子水进一步清洁表面。

公开(公告)号：US06987321B2

公开(公告)日：2006-01-17

申请号：US10718865

申请日：2003-11-21

申请人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subbash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

发明人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subbash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

IPC分类号： H01L23/48

CPC分类号： H01L21/76844 ,  H01L21/28556 ,  H01L21/31111 ,  H01L21/314 ,  H01L21/76807

摘要： Method and product for forming a dual damascene interconnect structure, wherein depositing a copper sulfide interface layer as sidewalls to the opening deters migration or diffusing of copper ions into the dielectric material.

摘要翻译： 用于形成双镶嵌互连结构的方法和产品，其中将铜硫化物界面层作为开口的侧壁沉积阻止铜离子迁移或扩散到电介质材料中。

公开(公告)号：US06429117B1

公开(公告)日：2002-08-06

申请号：US09619018

申请日：2000-07-19

申请人： John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

发明人： John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

IPC分类号： H01L214763

CPC分类号： H01L21/76831 ,  H01L21/3105 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76826 ,  Y10S438/958

摘要： A method of preventing metal penetration and diffusion from metal structures formed over a semiconductor structure, comprising the following steps. A semiconductor structure including a patterned dielectric layer is provided. The patterned dielectric layer includes an opening and an upper surface. The dielectric layer surface is then passivated to form a passivation layer. A metal plug is formed within the dielectric layer opening. The passivation layer prevents penetration and diffusion of metal out from the metal plug into the semiconductor structure and the patterned dielectric layer.

摘要翻译： 一种防止在半导体结构上形成的金属结构的金属渗透和扩散的方法，包括以下步骤。 提供包括图案化介电层的半导体结构。 图案化电介质层包括开口和上表面。 然后将介电层表面钝化以形成钝化层。 在电介质层开口内形成金属塞。 钝化层防止金属从金属插塞渗入并扩散到半导体结构和图案化的介电层中。

公开(公告)号：US06350689B1

公开(公告)日：2002-02-26

申请号：US09839962

申请日：2001-04-23

申请人： Paul Ho ,  Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Yi Xu

发明人： Paul Ho ,  Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Yi Xu

IPC分类号： H01L2144

CPC分类号： H01L21/02074 ,  H01L21/02046 ,  H01L21/0209 ,  H01L21/32136 ,  Y10S438/906

摘要： A method of removing copper contamination from a semiconductor wafer, comprising the following steps. A semiconductor wafer having copper contamination thereon is provided. An oxidizing radical containing downstream plasma is provided from a first source (alternatively halogen (F2, Cl2, or Br2) may be used as on oxidizing agent). A vaporized chelating agent is provided from a second source. The oxidizing radical containing downstream plasma and vaporized chelating agent are mixed to form an oxidizing radical containing downstream plasma/vaporized chelating agent mixture. The mixture is directed to the copper contamination so that the mixture reacts with the copper contamination to form a volatile product. The volatile product is removed from the proximity of the wafer.

摘要翻译： 一种从半导体晶片去除铜污染的方法，包括以下步骤。 提供其上具有铜污染的半导体晶片。 从第一来源提供含有下游等离子体的氧化基团（或者可以在氧化剂上使用卤素（F2，Cl2或Br2））。 从第二来源提供蒸发的螯合剂。 将含有下游等离子体和气化螯合剂的氧化基团混合以形成含有下游等离子体/汽化螯合剂混合物的氧化基团。 混合物被引导到铜污染物，使得混合物与铜污染物反应形成挥发性产物。 从晶片附近去除挥发性产物。

公开(公告)号：US06340608B1

公开(公告)日：2002-01-22

申请号：US09612564

申请日：2000-07-07

申请人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Ho ,  Xu Yi

发明人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Ho ,  Xu Yi

IPC分类号： H01L2150

CPC分类号： H01L24/81 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal track thereover are provided. A metal bump is formed over the exposed metal terminating pad. A photosensitive resin plug is formed over the metal bump. The metal bump of the semiconductor chip is aligned with the corresponding metal track on the separate substrate. The photosensitive resin plug over the metal bump is mated with the corresponding the metal track. The photosensitive resin plug is exposed to UV light to cure the photosensitive resin plug, permanently attaching the metal bump of the semiconductor chip to the corresponding metal track of the separate substrate.

摘要翻译： 提供了具有暴露的金属端接垫的半导体芯片，以及具有其上相应的暴露的金属轨道的单独的基板。 在暴露的金属端接垫上方形成金属凸块。 在金属凸块上形成感光树脂插头。 半导体芯片的金属凸块与分离的基板上的对应金属轨迹对准。 金属凸块上的感光树脂插头与相应的金属轨道配合。 感光树脂插头暴露于紫外线光以固化光敏树脂插头，将半导体芯片的金属凸块永久地连接到单独基板的相应金属轨道上。

公开(公告)号：US20050112799A1

公开(公告)日：2005-05-26

申请号：US10988768

申请日：2004-11-15

申请人： Simon Chooi ,  Yakub Aliyu ,  Mei Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Ho ,  Yi Xu

发明人： Simon Chooi ,  Yakub Aliyu ,  Mei Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Ho ,  Yi Xu

IPC分类号： H01L21/44 ,  H01L21/50 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05568 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.

公开(公告)号：US06391783B1

公开(公告)日：2002-05-21

申请号：US09615811

申请日：2000-07-13

申请人： John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

发明人： John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

IPC分类号： H01L2131

CPC分类号： H01L21/76844 ,  H01L21/288 ,  H01L21/76867

摘要： A method of forming a metal plug, comprising the following steps. An etched dielectric layer, over a conductive layer, over a semiconductor structure are provided. The etched dielectric layer having a via hole and an exposed periphery. The etched dielectric layer is treated with at least one alkaline earth element source to form an in-situ metal barrier layer within the dielectric layer exposed periphery. A metal plug is formed within the via hole wherein the in-situ metal barrier layer prevents diffusion of the metal from the metal plug into the dielectric oxide layer.

摘要翻译： 一种形成金属塞的方法，包括以下步骤。 提供了在半导体结构之上的导电层上的蚀刻介电层。 蚀刻的介电层具有通孔和暴露的周边。 蚀刻的电介质层用至少一个碱土元素源处理，以在电介质层外露的外围形成原位金属阻挡层。 在通孔内形成金属塞，其中原位金属阻挡层防止金属从金属塞扩散到电介质氧化物层中。

公开(公告)号：US07452808B2

公开(公告)日：2008-11-18

申请号：US10988768

申请日：2004-11-15

申请人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

发明人： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05568 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.

摘要翻译： 提供了具有暴露的金属端接垫的半导体芯片，以及在其上具有对应的暴露的金属凸块的单独的基板。 在暴露的金属端接垫上形成导电聚合物塞。 在导电聚合物塞上形成一个符合标准的界面层。 半导体芯片的导电聚合物插塞与相应的金属凸块对准。 导电聚合物塞上的一致界面层与相应的金属凸块配合。 一致的界面层被热分解，粘附和永久地附着导电聚合物塞与相应的金属凸块。 还公开了形成和图案化羰基镍层的方法。