公开(公告)号：US20120279865A1

公开(公告)日：2012-11-08

申请号：US13289391

申请日：2011-11-04

Applicant: Louis Regniere ,  Yakub Aliyu ,  Rainer M. Schmitt ,  Theodore M. Johnson ,  Ronald A. Kropp ,  Christian Liautaud ,  Deda Diatezua ,  Isaac R. Abothu ,  De Liufu ,  Richard Irving ,  Patrick D. Brown ,  Walter C. Mick ,  William H. Tanubrata ,  Omid S. Jahromi ,  John Boudreaux ,  David B. Clarke ,  Jack S. Chorpenning ,  Bryce M. Barbato ,  Honorio R. Ulep ,  William R. Robinson, JR.

Inventor： Louis Regniere ,  Yakub Aliyu ,  Rainer M. Schmitt ,  Theodore M. Johnson ,  Ronald A. Kropp ,  Christian Liautaud ,  Deda Diatezua ,  Isaac R. Abothu ,  De Liufu ,  Richard Irving ,  Patrick D. Brown ,  Walter C. Mick ,  William H. Tanubrata ,  Omid S. Jahromi ,  John Boudreaux ,  David B. Clarke ,  Jack S. Chorpenning ,  Bryce M. Barbato ,  Honorio R. Ulep ,  William R. Robinson, JR.

IPC: C25D5/02

CPC classification number: C23C18/54 ,  C25D5/48

Abstract: Provided herein is a method of making an integrated circuit device using copper metallization on 1-3 PZT composite. The method includes providing an overlay of electroplated immersion of gold (Au) to cover copper metal traces, the overlay preventing oxidation on 1:3 PZT composite with material. Also included is the formation of immersion Au nickel electrodes on the 1-3 PZT composite to achieve pad metallization for external connections.

Abstract translation: 本文提供了在1-3PZT复合材料上制造使用铜金属化的集成电路器件的方法。 该方法包括提供金（Au）的电镀浸渍覆盖铜金属迹线的覆盖层，该覆盖层防止1：3 PZT复合材料与材料的氧化。 还包括在1-3 PZT复合材料上形成浸金Au镍电极，以实现外部连接的焊盘金属化。

公开(公告)号：US20110269307A1

公开(公告)日：2011-11-03

申请号：US13098964

申请日：2011-05-02

Applicant: Yakub Aliyu ,  Deda Diatezua

Inventor： Yakub Aliyu ,  Deda Diatezua

IPC: H01L21/768

CPC classification number: H01L23/15 ,  H01L21/4846 ,  H01L23/49866 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided herein is a method of making an integrated circuit device using copper metallization on 1-3 PZT composite. The method includes providing an overlay of electroplated immersion of gold (Au) to cover copper metal traces, the overlay preventing oxidation on 1:3 PZT composite with material. Also included is the formation of immersion Au nickel electrodes on the 1-3 PZT composite to achieve pad metallization for external connections.

Abstract translation: 本文提供了在1-3PZT复合材料上制造使用铜金属化的集成电路器件的方法。 该方法包括提供金（Au）的电镀浸渍覆盖铜金属迹线的覆盖层，该覆盖层防止1：3 PZT复合材料与材料的氧化。 还包括在1-3 PZT复合材料上形成浸金Au镍电极，以实现外部连接的焊盘金属化。

公开(公告)号：US06987321B2

公开(公告)日：2006-01-17

申请号：US10718865

申请日：2003-11-21

Applicant: Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subbash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

Inventor： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subbash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

IPC: H01L23/48

CPC classification number: H01L21/76844 ,  H01L21/28556 ,  H01L21/31111 ,  H01L21/314 ,  H01L21/76807

Abstract: Method and product for forming a dual damascene interconnect structure, wherein depositing a copper sulfide interface layer as sidewalls to the opening deters migration or diffusing of copper ions into the dielectric material.

Abstract translation: 用于形成双镶嵌互连结构的方法和产品，其中将铜硫化物界面层作为开口的侧壁沉积阻止铜离子迁移或扩散到电介质材料中。

公开(公告)号：US20050090037A1

公开(公告)日：2005-04-28

申请号：US10978198

申请日：2004-10-29

Applicant: Yakub Aliyu ,  Simon Chooi ,  Mei Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Roy

Inventor： Yakub Aliyu ,  Simon Chooi ,  Mei Zhou ,  John Sudijono ,  Subhash Gupta ,  Sudipto Roy

IPC: H01L21/44 ,  H01L21/50 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05568 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.

公开(公告)号：US06705512B2

公开(公告)日：2004-03-16

申请号：US10099283

申请日：2002-03-15

Applicant: Kwok Keung Paul Ho ,  Simon Chooi ,  Yi Xu ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

Inventor： Kwok Keung Paul Ho ,  Simon Chooi ,  Yi Xu ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

IPC: B23K3102

CPC classification number: H01L24/85 ,  B23K20/007 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/04953 ,  H01L2224/78 ,  H01L2924/00

Abstract: A method of bonding a bonding element to a metal bonding pad comprises the following steps. A semiconductor structure having an exposed, recessed metal bonding pad within a layer opening is provided. The layer has an upper surface. A conductive cap having a predetermined thickness is formed over the metal bonding pad. A bonding element is bonded to the conductive cap to form an electrical connection with the metal bonding pad.

Abstract translation: 将接合元件接合到金属接合焊盘的方法包括以下步骤。 提供了一种在层开口内具有暴露的凹陷金属接合焊盘的半导体结构。 该层具有上表面。 在金属焊盘上形成具有预定厚度的导电盖。 接合元件结合到导电盖以与金属接合焊盘形成电连接。

公开(公告)号：US06415973B1

公开(公告)日：2002-07-09

申请号：US09618672

申请日：2000-07-18

Applicant: Kwok Keung Paul Ho ,  Simon Chooi ,  Yi Xu ,  Mei Sheng Zhou ,  Yakub Aliyu ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

Inventor： Kwok Keung Paul Ho ,  Simon Chooi ,  Yi Xu ,  Mei Sheng Zhou ,  Yakub Aliyu ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

IPC: B23K106

CPC classification number: H01L24/85 ,  B23K1/19 ,  B23K2101/40 ,  B23K2103/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48647 ,  H01L2224/48747 ,  H01L2224/48847 ,  H01L2224/48992 ,  H01L2224/8592 ,  H01L2224/85948 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/78 ,  H01L2924/00

Abstract: A method of bonding a bonding element to a metal bonding pad, comprising the following steps. A semiconductor structure having an exposed metal bonding pad within a passivation layer opening is provided. The bonding pad has an upper surface. A bonding element is positioned to contact the bonding pad upper surface. A bonding solution is applied within the passivation layer opening, covering the bonding pad and a portion of the bonding element. The structure is annealed by heating said bonding element to selectively solidify the bonding solution proximate said contact of said bonding element to said bonding pad, bonding the bonding element to the bonding pad.

Abstract translation: 一种将接合元件接合到金属接合焊盘的方法，包括以下步骤。 提供了在钝化层开口内具有暴露的金属焊盘的半导体结构。 接合垫具有上表面。 定位接合元件以接合焊盘上表面。 在钝化层开口内施加粘合溶液，覆盖粘结垫和粘合元件的一部分。 通过加热所述结合元件来对所述结构进行退火，以选择性地将所述接合元件的所述接触附近的接合溶液固化到所述接合焊盘，将所述接合元件接合到所述接合焊盘。

公开(公告)号：US06686279B2

公开(公告)日：2004-02-03

申请号：US10114680

申请日：2002-04-01

Applicant: Daniel Yen ,  Wei Hua Cheng ,  Yakub Aliyu ,  Lee Yuan Ping

Inventor： Daniel Yen ,  Wei Hua Cheng ,  Yakub Aliyu ,  Lee Yuan Ping

IPC: H01L2144

CPC classification number: H01L21/76831 ,  H01L21/76802

Abstract: A method and apparatus for reducing gouging during via formation. In one embodiment, the present invention is comprised of a method which includes forming an opening into a substrate. The opening is formed extending into the substrate and terminating on at least a portion of a target to which it is desired to form an electrical connection. After the formation of the opening, the present embodiment lines the opening with a liner material. In this embodiment, the liner material is adapted to at least partially fill a portion of the opening which is not landed on the target. The liner material of the present embodiment prevents substantial further etching of the substrate conventionally caused by the opening being at least partially unlanded on the target. Next, the present embodiment subjects the liner material to an etching process such that the liner material is substantially removed from that region of the target where the opening was landed on the target. In this embodiment, liner material residing in the region where the opening is unlanded prevents further gouging of the substrate proximate to the target.

Abstract translation: 一种用于在通孔形成期间减少气刨的方法和装置。 在一个实施例中，本发明包括一种方法，该方法包括在基底中形成开口。 开口形成为延伸到基板中并终止于期望形成电连接的目标的至少一部分上。 在形成开口之后，本实施例用衬里材料排列开口。 在该实施例中，衬垫材料适于至少部分地填充未着陆在靶上的开口的一部分。 本实施例的衬垫材料防止了通常由开口至少部分地不在目标上引起的基板的进一步蚀刻。 接下来，本实施例使衬里材料进行蚀刻工艺，使得衬里材料基本上从开口落在靶上的靶的区域中去除。 在这个实施例中，位于开口未被覆盖的区域中的衬垫材料防止了靠近靶的衬底进一步的刨削。

公开(公告)号：US06683002B1

公开(公告)日：2004-01-27

申请号：US09636580

申请日：2000-08-10

Applicant: Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

Inventor： Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy ,  Paul Kwok Keung Ho ,  Yi Xu

IPC: H01L2144

CPC classification number: H01L21/76844 ,  H01L21/28556 ,  H01L21/31111 ,  H01L21/314 ,  H01L21/76807

Abstract: Method and product for forming a dual damascene interconnect structure, wherein depositing a copper sulfide interface layer as sidewalls to the opening deters migration or diffusing of copper ions into the dielectric material.

公开(公告)号：US06417088B1

公开(公告)日：2002-07-09

申请号：US09624019

申请日：2000-07-24

Applicant: Kwok Keung Paul Ho ,  Yi Xu ,  Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

Inventor： Kwok Keung Paul Ho ,  Yi Xu ,  Simon Chooi ,  Yakub Aliyu ,  Mei Sheng Zhou ,  John Leonard Sudijono ,  Subhash Gupta ,  Sudipto Ranendra Roy

IPC: H01L2144

CPC classification number: H01L24/48 ,  H01L21/288 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48644 ,  H01L2224/48699 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744

Abstract: A method of forming a conductive cap layer over a metal bonding pad comprises the following steps. A semiconductor structure is provided having an exposed, recessed metal bonding pad within a layer opening. The layer has an upper surface. The exposed metal bonding pad is treated with a solution containing soluble metal ions to form a conductive cap over the metal bonding pad. The conductive cap layer is comprised of the solution metal and has a predetermined thickness. An external bonding element may then be bonded to the conductive cap, forming an electrical connection with the metal bonding pad.

Abstract translation: 在金属焊盘上形成导电盖层的方法包括以下步骤。 提供了一种半导体结构，其在层开口内具有暴露的凹陷的金属接合焊盘。 该层具有上表面。 暴露的金属焊盘用含有可溶性金属离子的溶液处理，以在金属焊盘上形成导电盖。 导电盖层由溶液金属构成并具有预定的厚度。 然后可以将外部接合元件接合到导电盖，与金属接合焊盘形成电连接。

公开(公告)号：US06391783B1

公开(公告)日：2002-05-21

申请号：US09615811

申请日：2000-07-13

Applicant: John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

Inventor： John Sudijono ,  Yakub Aliyu ,  Mei Sheng Zhou ,  Simon Chooi ,  Subhash Gupta ,  Sudipto Roy ,  Paul Ho ,  Yi Xu

IPC: H01L2131

CPC classification number: H01L21/76844 ,  H01L21/288 ,  H01L21/76867

Abstract: A method of forming a metal plug, comprising the following steps. An etched dielectric layer, over a conductive layer, over a semiconductor structure are provided. The etched dielectric layer having a via hole and an exposed periphery. The etched dielectric layer is treated with at least one alkaline earth element source to form an in-situ metal barrier layer within the dielectric layer exposed periphery. A metal plug is formed within the via hole wherein the in-situ metal barrier layer prevents diffusion of the metal from the metal plug into the dielectric oxide layer.

Abstract translation: 一种形成金属塞的方法，包括以下步骤。 提供了在半导体结构之上的导电层上的蚀刻介电层。 蚀刻的介电层具有通孔和暴露的周边。 蚀刻的电介质层用至少一个碱土元素源处理，以在电介质层外露的外围形成原位金属阻挡层。 在通孔内形成金属塞，其中原位金属阻挡层防止金属从金属塞扩散到电介质氧化物层中。