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    POWER SOURCE ISOLATION CIRCUITS FOR HEATER ELEMENTS OF SUBSTRATE SUPPORTS OF SUBSTRATE PROCESSING SYSTEMS
    11.
    发明申请
    POWER SOURCE ISOLATION CIRCUITS FOR HEATER ELEMENTS OF SUBSTRATE SUPPORTS OF SUBSTRATE PROCESSING SYSTEMS 有权

    公开(公告)号：US20220367229A1

    公开(公告)日：2022-11-17

    申请号：US17765470

    申请日：2020-10-05

    Applicant: LAM RESEARCH CORPORATION

    Inventor： Vincent BURKHART ,  Karl Frederick LEESER

    IPC: H01L21/683 ,  H01J37/32 ,  H02M3/158 ,  H02M7/5387

    Abstract: A substrate processing system includes a substrate support and a power supply circuit. The substrate support is configured to support a substrate, wherein the substrate support comprises one or more heating elements. The power supply circuit includes: a direct current-to-alternating current converter configured to convert a first direct current voltage to a first alternating current voltage, where the direct current-to-alternating current converter comprises at least one switch; and an isolation circuit comprising one of a coupled inductor or a transformer. The one of the coupled inductor or the transformer is configured to convert the first alternating current voltage to and second alternating current voltage and isolate the one or more heating elements from an earth ground. The power supply circuit is configured to provide an output voltage to the one or more heating elements based on the second alternating current voltage.

    BACKSIDE DEPOSITION PREVENTION ON SUBSTRATES
    13.
    发明公开
    BACKSIDE DEPOSITION PREVENTION ON SUBSTRATES 审中-公开

    公开(公告)号：US20240200191A1

    公开(公告)日：2024-06-20

    申请号：US18287372

    申请日：2022-04-15

    Applicant: LAM RESEARCH CORPORATION

    Inventor： Christopher GAGE ,  Ramesh CHANDRASEKHARAN ,  Eric H. LENZ ,  Karl Frederick LEESER

    IPC: C23C16/458 ,  C23C16/04 ,  C23C16/455

    CPC classification number: C23C16/4585 ,  C23C16/04 ,  C23C16/45521 ,  C23C16/45565 ,  C23C16/4586

    Abstract: Various systems and methods are provided to prevent backside deposition on a substrate by using a combination of approaches. The approaches include clamping the substrate to a pedestal and/or supplying purge gases to an area where deposition is not desired. The clamping methods include electrostatic or vacuum clamping. In addition, various pedestal and edge ring designs are provided for supplying purge gases to the area where deposition is not desired. The use of clamping in conjunction with purging can further enhance the performance without affecting deposition of materials on front side of the substrate. The clamping along the edge of the substrate can be made more effective by machining an upper surface of the pedestal to have a slight dish or dome like shape (i.e., concave or convex, respectively).

    FREQUENCY BASED IMPEDANCE ADJUSTMENT IN TUNING CIRCUITS
    14.
    发明申请
    FREQUENCY BASED IMPEDANCE ADJUSTMENT IN TUNING CIRCUITS 有权

    公开(公告)号：US20220375719A1

    公开(公告)日：2022-11-24

    申请号：US17774521

    申请日：2020-10-27

    Applicant: LAM RESEARCH CORPORATION

    Inventor： Stephen TOPPING ,  Karl Frederick LEESER ,  David FRENCH ,  Jin Jimmy WANG ,  Brandt HENRI

    IPC: H01J37/32 ,  H03H7/38 ,  H01L21/683

    Abstract: A substrate processing system for processing a substrate within a processing chamber includes a matching network, a tuning circuit, and a controller. The matching network receives a first RF signal having a first frequency from a RF generator and impedance matches an input of the matching network to an output of the RF generator. The tuning circuit is distinct from the matching network and includes a circuit component having a first impedance. The tuning circuit receives an output of the matching network and outputs a second RF signal to a first electrode in a substrate support. The controller determines a target impedance for the circuit component, and based on the target impedance, signal the RF generator to adjust the first frequency of the first RF signal received at the matching network to a second frequency to alter the first impedance of the circuit component to match the target impedance.

    MECHANICAL INDEXER FOR MULTI-STATION PROCESS MODULE
    18.
    发明申请
    MECHANICAL INDEXER FOR MULTI-STATION PROCESS MODULE 有权

    公开(公告)号：US20210320029A1

    公开(公告)日：2021-10-14

    申请号：US17306226

    申请日：2021-05-03

    Applicant: Lam Research Corporation

    Inventor： Michael NORDIN ,  Karl Frederick LEESER ,  Richard BLANK ,  Robert SCULAC ,  Damien Martin SLEVIN

    IPC: H01L21/687 ,  H01L21/67 ,  H01L21/677

    Abstract: A process module for a substrate processing tool includes a plurality of processing stations each configured to perform a process on a substrate and a mechanical indexer arranged within the process module. The mechanical indexer includes a plurality of end effectors including at least a first end effector, a second end effector, and a third end effector. Each of the plurality of end effectors extends in a radial direction from a central axis of the mechanical indexer and is configured to rotate about the central axis within the process module. The mechanical indexer is configured to position each of the plurality of end effectors at any one of the plurality of processing stations within the process module. The mechanical indexer is configured to position more than one of the plurality of end effectors at a same one of the plurality of processing stations at a same time.

    CHEMICAL VAPOR DEPOSITION TOOL FOR PREVENTING OR SUPPRESSING ARCING
    19.
    发明申请
    CHEMICAL VAPOR DEPOSITION TOOL FOR PREVENTING OR SUPPRESSING ARCING 审中-公开

    公开(公告)号：US20200048770A1

    公开(公告)日：2020-02-13

    申请号：US16057383

    申请日：2018-08-07

    Applicant: Lam Research Corporation

    Inventor： Yukinori SAKIYAMA ,  Karl Frederick LEESER ,  Vincent BURKHART

    IPC: C23C16/52 ,  H01J37/32 ,  C23C16/505

    Abstract: A Chemical Vapor Deposition (CVD) tool that suppresses or altogether eliminates arcing between a substrate pedestal and substrate. The CVD tool includes a Direct Current (DC) bias control system arranged to maintain a substrate pedestal provided in a processing chamber at a same or substantially the same DC bias voltage as developed by a plasma in the processing chamber. By maintaining the substrate pedestal and the substrate having the same potential as the plasma at the same or substantially the same voltage potential, arcing is suppressed or altogether eliminated.

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