公开(公告)号：USRE38565E1

公开(公告)日：2004-08-17

申请号：US10359997

申请日：2003-02-06

申请人： Shinichiro Hayashi ,  Tatsuo Otsuki

发明人： Shinichiro Hayashi ,  Tatsuo Otsuki

IPC分类号： H01L2100

CPC分类号： H01L28/60 ,  H01L28/55

摘要： A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by carefully controlled drying, soft baking, and annealing conditions.

公开(公告)号：US06440754B2

公开(公告)日：2002-08-27

申请号：US09843230

申请日：2001-04-26

申请人： Shinichiro Hayashi ,  Tatsuo Otsuki

发明人： Shinichiro Hayashi ,  Tatsuo Otsuki

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L21/768 ,  H01L28/55 ,  H01L28/60

摘要： A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by carefully controlled drying, soft baking, and annealing conditions.

摘要翻译： 铁电薄膜电容器具有平滑的电极，允许相对较强的极化，较少的疲劳和较少的压印，因为铁电电容器老化。 光滑的电极表面是通过仔细控制的干燥，软烘烤和退火条件生产的。

公开(公告)号：US06876030B2

公开(公告)日：2005-04-05

申请号：US09956556

申请日：2001-09-20

申请人： Kiyoshi Uchiyama ,  Yasuhiro Shimada ,  Koji Arita ,  Tatsuo Otsuki

发明人： Kiyoshi Uchiyama ,  Yasuhiro Shimada ,  Koji Arita ,  Tatsuo Otsuki

IPC分类号： B65G1/137 ,  G11C11/22 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L29/51 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC分类号： H01L29/516 ,  H01L29/78391 ,  H01L29/7881

摘要： A semiconductor memory device includes a field-effect transistor with a gate electrode that has been formed over a semiconductor substrate with a ferroelectric layer interposed between the electrode and the substrate. The device includes a first insulating layer, which is insulated against a leakage current more fully than the ferroelectric layer, between the ferroelectric layer and the gate electrode.

摘要翻译： 半导体存储器件包括具有栅极电极的场效应晶体管，该栅极电极已经形成在半导体衬底上，其中介于电极和衬底之间的铁电层。 该器件包括第一绝缘层，其在铁电层和栅电极之间绝对抵抗比铁电层更全面的泄漏电流。

公开(公告)号：US06333528B1

公开(公告)日：2001-12-25

申请号：US09071795

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US6015987A

公开(公告)日：2000-01-18

申请号：US71122

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/108 ,  H01L29/00 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5624864A

公开(公告)日：1997-04-29

申请号：US284984

申请日：1994-08-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US06169304A

公开(公告)日：2001-01-02

申请号：US09071534

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5780351A

公开(公告)日：1998-07-14

申请号：US844108

申请日：1997-04-28

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/20 ,  H01L21/00

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种半导体器件，其在形成集成电路的半导体衬底上通过层间绝缘层形成电容器。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US4712023A

公开(公告)日：1987-12-08

申请号：US929844

申请日：1986-11-13

申请人： Tatsuo Otsuki ,  Akio Shimano ,  Hiromitsu Aoki ,  Ikuko Aoki

发明人： Tatsuo Otsuki ,  Akio Shimano ,  Hiromitsu Aoki ,  Ikuko Aoki

IPC分类号： H03K19/0185 ,  H03K17/687 ,  H03K19/017 ,  H03K19/0944 ,  H03K19/0952 ,  H03K19/094

CPC分类号： H03K19/0952 ,  H03K19/01721

摘要： A buffered FET logic gate circuit has a bias diode (9), which is connected across the gate and the source of a current source FET (4) of a buffer part (3, 4), and a capacitor (8), which is connected across the gate of said FET (4) and an input terminal (V.sub.I); and thereby a high load drivability with a low power consumption rate is realized.

摘要翻译： 缓冲FET逻辑门电路具有偏置二极管（9），其连接在缓冲器部分（3,4）的电流源FET（4）的栅极和源极和电容器（8）之间，该电容器 连接在所述FET（4）的栅极和输入端子（VI）之间; 从而实现了具有低功率消耗率的高负载驾驶性能。

公开(公告)号：US06294438B1

公开(公告)日：2001-09-25

申请号：US09589520

申请日：2000-06-08

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。