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公开(公告)号:US11277455B2
公开(公告)日:2022-03-15
申请号:US16430457
申请日:2019-06-04
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Alex Vainman , Natan Manevich , Nir Nitzani , Ilan Smith , Richard Hastie , Noam Bloch , Lior Narkis , Rafi Weiner
IPC: H04L29/06 , H04L12/861 , H04L12/851 , H04L12/841 , H04L12/801 , H04L12/823 , H04L65/613 , H04L65/80 , H04L67/01 , H04L49/90 , H04L47/2441 , H04L47/28 , H04L47/34 , H04L47/32 , H04L29/08 , H04L67/06
Abstract: A method including configuring a transmit process to store information including a queue of packets to be transmitted, the queue defining transmit process packets to be transmitted, each packet associated with a transmission time, and configuring a synchronization process to receive from the transmit process at least some of the information. The synchronization process performs one of: A) accessing a dummy send queue and a completion queue, and transmitting one or more of the transmit process packets in accordance with a completion queue entry in the completion queue, and B) sends a doorbell to transmission hardware at a time when at least one of the transmit process packets is to be transmitted, the synchronization process including a master queue configured to store transmission entries, each transmission entry including a transmit process indicator and an indication of transmit process packets to be transmitted. Related apparatus and methods are also described.
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公开(公告)号:US20210328923A1
公开(公告)日:2021-10-21
申请号:US16853783
申请日:2020-04-21
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Avi Urman , Lior Narkis , Ariel Shahar
IPC: H04L12/743 , H04L12/815
Abstract: In one embodiment, a network device includes an interface configured to receive a data packet including a header section, at least one parser to parse the data of the header section yielding a first header portion and a second header portion, a packet processing engine to fetch a first match-and-action table, match a first index having a corresponding first steering action entry in the first match-and-action table responsively to the first header portion, compute a cumulative lookup value based on the first header portion and the second header portion responsively to the first steering action entry, fetch a second match-and-action table responsively to the first steering action entry, match a second index having a corresponding second steering action entry in the second match-and-action table responsively to the cumulative lookup value, and steering the packet responsively to the second steering action entry.
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公开(公告)号:US20210297151A1
公开(公告)日:2021-09-23
申请号:US16921993
申请日:2020-07-07
Applicant: Mellanox Technologies, Ltd.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis , Liron Mula , Paraskevas Bakopoulos , Ariel Almog , Roee Moyal , Gal Yefet
IPC: H04B7/26 , H04W72/04 , H04W74/08 , H04L12/931 , H04L12/861
Abstract: A network element one or more network ports, network time circuitry and packet processing circuitry. The network ports are configured to communicate with a communication network. The network time circuitry is configured to track a network time defined in the communication network. In some embodiments the packet processing circuitry is configured to receive a definition of one or more timeslots that are synchronized to the network time, and to send outbound packets to the communication network depending on the timeslots. In some embodiments the packet processing circuitry is configured to process inbound. packets, which are received from the communication network, depending on the timeslots.
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公开(公告)号:US20210243140A1
公开(公告)日:2021-08-05
申请号:US16782075
申请日:2020-02-05
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis , Liron Mula
IPC: H04L12/861 , H04L29/06 , H04L12/741 , H04L12/46 , H04L12/931 , H04L12/801 , H04W56/00
Abstract: A network adapter includes a host interface configured to communicate with a host, a network interface configured to communicate with a communication network, and packet processing circuitry. The packet processing circuitry is configured to receive a packet from the host via the host interface, or from the communication network via the network interface, to receive an indication of a network time used for synchronizing network elements in the communication network, to match the packet to a rule, the rule including a condition and an action, and to perform the action in response to the packet meeting the condition, wherein one or more of (i) the condition in the rule and (ii) the action in the rule, depend on the network time.
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公开(公告)号:US20150180959A1
公开(公告)日:2015-06-25
申请号:US14637414
申请日:2015-03-04
Applicant: Mellanox Technologies Ltd.
Inventor: Noam Bloch , Eitan Hirshberg , Michael Kagan , Lior Narkis
CPC classification number: H04L67/10 , G06F9/45533 , H04L12/4633 , H04L45/64
Abstract: A network interface device includes a host interface for connection to a host processor having a memory. A network interface is configured to transmit and receive data packets over a data network, which supports multiple tenant networks overlaid on the data network. Processing circuitry is configured to receive, via the host interface, a work item submitted by a virtual machine running on the host processor, and to identify, responsively to the work item, a tenant network over which the virtual machine is authorized to communicate, wherein the work item specifies a message to be sent to a tenant destination address. The processing circuitry generates, in response to the work item, a data packet containing an encapsulation header that is associated with the tenant network, and to transmit the data packet over the data network to at least one data network address corresponding to the specified tenant destination address.
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公开(公告)号:US11916790B2
公开(公告)日:2024-02-27
申请号:US16865567
申请日:2020-05-04
Applicant: Mellanox Technologies, Ltd.
Inventor: Avi Urman , Lior Narkis , Noam Bloch , Eyal Srebro , Shay Aisman
CPC classification number: H04L47/12 , H04L47/10 , H04L47/24 , H04L47/30 , H04L47/32 , H04L47/326 , H04L49/3045 , H04L47/26 , H04L47/29
Abstract: A network adapter includes a host interface, a network interface, a memory and packet processing circuitry. The memory holds a shared buffer and multiple queues allocated to the multiple host processors. The packet processing circuitry is configured to receive from the network interface data packets destined to the host processors, to store payloads of at least some of the data packets in the shared buffer, to distribute headers of at least some of the data packets to the queues, to serve the data packets to the host processors by applying scheduling among the queues, to detect congestion in the data packets destined to a given host processor among the host processors, and, in response to the detected congestion, to mitigate the congestion in the data packets destined to the given host processor, while retaining uninterrupted processing of the data packets destined to the other host processors.
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公开(公告)号:US11470007B2
公开(公告)日:2022-10-11
申请号:US17151705
申请日:2021-01-19
Applicant: Mellanox Technologies, Ltd.
Inventor: Avi Urman , Lior Narkis , Omri Kahalon
IPC: H04L47/20 , H04L47/2466 , H04L47/2475 , G06F9/455 , H04L47/783 , H04L47/12
Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface is configured to connect to a communication network. The host interface is configured to communicate with a host processor running multiple application programs. The processing circuitry includes one or more bandwidth-control policers, and is configured to receive from the communication network a packet destined to given application program among the application programs running on the host processor, to associate a bandwidth-control policer with the packet, selected from among the bandwidth-control policers, and to apply the selected bandwidth-control policer to the packet to produce a policer result.
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公开(公告)号:US20220086105A1
公开(公告)日:2022-03-17
申请号:US17535608
申请日:2021-11-25
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis
IPC: H04L12/939 , H04L12/861 , H04W28/04 , H04L29/06 , H04L12/879
Abstract: Communication apparatus includes a host interface and a network interface, which receives from a packet communication network at least one packet stream including a sequence of data packets, which include headers containing respective sequence numbers and data payloads containing slices of the data segment having a predefined, fixed size per slice. Packet processing circuitry is configured to receive the data packets from the network interface, and to map the data payloads of the data packets in the at least one packet stream, using a linear mapping of the sequence numbers, to respective addresses in the buffer.
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公开(公告)号:US11271874B2
公开(公告)日:2022-03-08
申请号:US16782075
申请日:2020-02-05
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Avi Urman , Lior Narkis , Liron Mula
IPC: H04L12/861 , H04L49/90 , H04L45/745 , H04L69/22 , H04W56/00 , H04L29/06 , H04L47/10 , H04L12/46 , H04L49/00
Abstract: A network adapter includes a host interface configured to communicate with a host, a network interface configured to communicate with a communication network, and packet processing circuitry. The packet processing circuitry is configured to receive a packet from the host via the host interface, or from the communication network via the network interface, to receive an indication of a network time used for synchronizing network elements in the communication network, to match the packet to a rule, the rule including a condition and an action, and to perform the action in response to the packet meeting the condition, wherein one or more of (i) the condition in the rule and (ii) the action in the rule, depend on the network time.
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公开(公告)号:US20220021629A1
公开(公告)日:2022-01-20
申请号:US16932765
申请日:2020-07-19
Applicant: Mellanox Technologies, Ltd.
Inventor: Gal Yefet , Avi Urman , Gil Kremer , Lior Narkis , Boris Pismenny
IPC: H04L12/861 , H04L12/851 , H04L29/06 , G06F9/54
Abstract: A network node includes a network adapter and a host. The network adapter is coupled to a communication network. The host includes a processor running a client process and a communication stack, and is configured to receive packets from the communication network, and classify the received packets into respective flows that are associated with respective chunks in a receive buffer, to distribute payloads of the received packets among the chunks so that payloads of packets classified to a given flow are stored in a given chunk assigned to the given flow, and to notify the communication stack of the payloads in the given chunk, for transferring the payloads in the given chunk to the client process.
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